JPH0325082B2 - - Google Patents
Info
- Publication number
- JPH0325082B2 JPH0325082B2 JP60077549A JP7754985A JPH0325082B2 JP H0325082 B2 JPH0325082 B2 JP H0325082B2 JP 60077549 A JP60077549 A JP 60077549A JP 7754985 A JP7754985 A JP 7754985A JP H0325082 B2 JPH0325082 B2 JP H0325082B2
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- semiconductor integrated
- circuit chip
- wirings
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 claims description 23
- 238000009413 insulation Methods 0.000 abstract 2
- 239000010410 layer Substances 0.000 description 6
- 239000000758 substrate Substances 0.000 description 4
- 239000003973 paint Substances 0.000 description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000000644 propagated effect Effects 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000004040 coloring Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 230000035699 permeability Effects 0.000 description 1
- 230000001902 propagating effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/184—Components including terminals inserted in holes through the printed circuit board and connected to printed contacts on the walls of the holes or at the edges thereof or protruding over or into the holes
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
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- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
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- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10689—Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/325—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4046—Through-connections; Vertical interconnect access [VIA] connections using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire
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- Engineering & Computer Science (AREA)
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- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Waveguide Connection Structure (AREA)
- Waveguides (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
【発明の詳細な説明】
〔概要〕
半導体集積回路チツプを搭載した多層配線基板
に於ける層間配線の接続部を、伝搬される信号の
種類に対応してインダクタンス成分が異なるよう
に構成し、高速動作の半導体集積回路チツプによ
る動作特性を改善したものである。
に於ける層間配線の接続部を、伝搬される信号の
種類に対応してインダクタンス成分が異なるよう
に構成し、高速動作の半導体集積回路チツプによ
る動作特性を改善したものである。
本発明は、数Gビツト/s程度の高速データを
処理する半導体集積回路チツプを多層配線基板上
に搭載して気密封止した高速集積回路パツケージ
に関するものである。
処理する半導体集積回路チツプを多層配線基板上
に搭載して気密封止した高速集積回路パツケージ
に関するものである。
Si(シリコン)やGaAs(ガリウム砒素)等の半
導体チツプに複数のトランジスタ等を形成して、
数Gビツト/s程度の高速データ処理を行う半導
体集積回路チツプが製作されており、このような
半導体集積回路チツプは、信頼性確保の為にパツ
ケージによつて気密封止する必要がある。
導体チツプに複数のトランジスタ等を形成して、
数Gビツト/s程度の高速データ処理を行う半導
体集積回路チツプが製作されており、このような
半導体集積回路チツプは、信頼性確保の為にパツ
ケージによつて気密封止する必要がある。
高速集積回路パツケージは、例えば、第3図の
概略断面図に示すように、多層配線基板15上に
半導体集積回路チツプ18を搭載し、この半導体
集積回路チツプ18と外部端子となる配線17と
を金線等の接続線19で接続し、多層配線基板の
周辺に絶縁体20を介して金属のキヤツプ21を
接合して、半導体集積回路チツプ18を気密封止
するものである。なお、16はアース等となる下
面の金属配線である。
概略断面図に示すように、多層配線基板15上に
半導体集積回路チツプ18を搭載し、この半導体
集積回路チツプ18と外部端子となる配線17と
を金線等の接続線19で接続し、多層配線基板の
周辺に絶縁体20を介して金属のキヤツプ21を
接合して、半導体集積回路チツプ18を気密封止
するものである。なお、16はアース等となる下
面の金属配線である。
半導体集積回路チツプ18を搭載する多層配線
基板15は、例えば、グリーンシートの状態で所
望の配線を施し且つ上下層の配線の接続用のスル
ーホールを形成し、順次積層して焼成するもので
ある。その場合の各層の配線の幅は同一で且つ層
間の配線を接続する為のスルーホールの直径も同
一である。
基板15は、例えば、グリーンシートの状態で所
望の配線を施し且つ上下層の配線の接続用のスル
ーホールを形成し、順次積層して焼成するもので
ある。その場合の各層の配線の幅は同一で且つ層
間の配線を接続する為のスルーホールの直径も同
一である。
多層配線基板15には、半導体集積回路チツプ
18上のトランジスタ等に電源を供給する為の配
線や、高速信号が伝搬する配線が混在しているも
のであり、前述のように、これらの配線の幅及び
各層の配線間を接続する為の接続部の直径も同一
である。即ち、従来は、直流電流が流れる径路
も、高周波信号が流れる径路も同一の構成のもの
である。その為、高速動作可能の半導体集積回路
チツプ18の特性を充分に引き出すことが困難で
あつた。
18上のトランジスタ等に電源を供給する為の配
線や、高速信号が伝搬する配線が混在しているも
のであり、前述のように、これらの配線の幅及び
各層の配線間を接続する為の接続部の直径も同一
である。即ち、従来は、直流電流が流れる径路
も、高周波信号が流れる径路も同一の構成のもの
である。その為、高速動作可能の半導体集積回路
チツプ18の特性を充分に引き出すことが困難で
あつた。
本発明は、高周波信号の流れる径路のインダク
タンス成分を小さくし、電源供給用の径路のイン
ダクタンス成分を大きくして、高速動作の半導体
集積回路チツプの特性を充分に発揮させることを
目的とするものである。
タンス成分を小さくし、電源供給用の径路のイン
ダクタンス成分を大きくして、高速動作の半導体
集積回路チツプの特性を充分に発揮させることを
目的とするものである。
本発明の高速集積回路パツケージは、第1図を
参照して説明すると、半導体集積回路チツプを搭
載する多層配線基板の高周波信号が伝搬する配線
1a,1b,1c間を、スルーホールによるイン
ダクタンス成分の小さい第1の接続部4a,4b
により接続し、電源供給用の配線2a,2b,2
c間を、第1の接続部4a,4bに比較して直径
を小さくするか又は長さを長くするかの何れか一
方或いは両方の構成としてインダクタンス成分を
大きくしたスルーホールによる第2の接続部5
a,5bにより接続したものである。
参照して説明すると、半導体集積回路チツプを搭
載する多層配線基板の高周波信号が伝搬する配線
1a,1b,1c間を、スルーホールによるイン
ダクタンス成分の小さい第1の接続部4a,4b
により接続し、電源供給用の配線2a,2b,2
c間を、第1の接続部4a,4bに比較して直径
を小さくするか又は長さを長くするかの何れか一
方或いは両方の構成としてインダクタンス成分を
大きくしたスルーホールによる第2の接続部5
a,5bにより接続したものである。
高周波信号が伝搬する配線間は、インダクタン
ス成分の小さい接続部4a,4bで接続されるの
で、伝搬遅延を受けることが少なくなり、それに
よつて高速動作の半導体集積回路チツプの特性を
充分に引き出すことができ、又電源供給用の配線
間は、インダクタンス成分の大きい接続部5a,
5bで接続されるので、電源供給用の配線に重畳
される高周波信号を減衰させ、異なる電源間のア
イソレーシヨン特性を向上させることができる。
ス成分の小さい接続部4a,4bで接続されるの
で、伝搬遅延を受けることが少なくなり、それに
よつて高速動作の半導体集積回路チツプの特性を
充分に引き出すことができ、又電源供給用の配線
間は、インダクタンス成分の大きい接続部5a,
5bで接続されるので、電源供給用の配線に重畳
される高周波信号を減衰させ、異なる電源間のア
イソレーシヨン特性を向上させることができる。
以下図面を参照して、本発明の実施例について
詳細に説明する。
詳細に説明する。
第1図は本発明の実施例の要部断面図であり、
半導体集積回路チツプやキヤツプ等の図示を省略
している。セラミツク等の絶縁基板6に、各層の
配線1a,1b,1c,2a,2b,2c,3
a,3bが形成され、配線1a,1b,1cには
高周波信号が伝搬し、配線2a,2b,2cには
電源供給用として直流電流が流れるものとする
と、高周波信号が伝搬する配線1a,1b,1c
間を接続する接続部4a,4bの直径を大きくし
てインダクタンス成分を小さくし、又直流電流の
みが流れる配線2a,2b,2c間を接続する接
続部5a,5bの直径を小さく或いは長くしてイ
ンダクタンス成分を大きくするものである。
半導体集積回路チツプやキヤツプ等の図示を省略
している。セラミツク等の絶縁基板6に、各層の
配線1a,1b,1c,2a,2b,2c,3
a,3bが形成され、配線1a,1b,1cには
高周波信号が伝搬し、配線2a,2b,2cには
電源供給用として直流電流が流れるものとする
と、高周波信号が伝搬する配線1a,1b,1c
間を接続する接続部4a,4bの直径を大きくし
てインダクタンス成分を小さくし、又直流電流の
みが流れる配線2a,2b,2c間を接続する接
続部5a,5bの直径を小さく或いは長くしてイ
ンダクタンス成分を大きくするものである。
高周波信号が伝搬する配線1a,1b,1c間
はインダクタンス成分の小さい接続部4a,4b
により接続されるものであるから、高速動作の半
導体集積回路チツプへの入力データ又は出力デー
タの遅延や波形歪が小さくなり、高速動作の半導
体集積回路チツプの特性を充分に引き出すことが
できる。
はインダクタンス成分の小さい接続部4a,4b
により接続されるものであるから、高速動作の半
導体集積回路チツプへの入力データ又は出力デー
タの遅延や波形歪が小さくなり、高速動作の半導
体集積回路チツプの特性を充分に引き出すことが
できる。
又電源供給用としての配線2a,2b,2c間
はインダクタンス成分の大きい接続部5a,5b
により接続されるものであるから、半導体集積回
路チツプに対する電源供給用の配線に於ける耐雑
音特性を向上することができる。この接続部5
a,5bは、インダクタンス成分を大きくする為
に、その長さを5bのように長くすることもで
き、又接続用の孔内に螺旋、或いは折返線路を形
成することもできる。
はインダクタンス成分の大きい接続部5a,5b
により接続されるものであるから、半導体集積回
路チツプに対する電源供給用の配線に於ける耐雑
音特性を向上することができる。この接続部5
a,5bは、インダクタンス成分を大きくする為
に、その長さを5bのように長くすることもで
き、又接続用の孔内に螺旋、或いは折返線路を形
成することもできる。
第2図は本発明の他の実施例の要部断面図であ
り、多層配線基板のうちの一層について示すもの
である。同図に於いて、10は絶縁基板、11,
12は配線、13はコイルである。これらの配線
11,12間はコイル13で接続されている。こ
のコイル13はインダクタンス成分を大きくする
為のものであり、例えば、グリーンシートに配線
間の接続用の孔を開け、この孔中に微細コイルを
捩じ込んで構成することができる。この微細コイ
ルは、積層したグリーンシートの焼成温度に耐え
られるようなタングステンやモリブデン等により
構成することが好適である。又この微細コイルと
配線11,12との接続は、例えば、グリーンシ
ート上に配線11,12を形成する導電性塗料を
塗布し、接続用孔に捩じ込んだ微細コイルの端部
にも導電性塗料を塗布して焼成すれば良いことに
なる。
り、多層配線基板のうちの一層について示すもの
である。同図に於いて、10は絶縁基板、11,
12は配線、13はコイルである。これらの配線
11,12間はコイル13で接続されている。こ
のコイル13はインダクタンス成分を大きくする
為のものであり、例えば、グリーンシートに配線
間の接続用の孔を開け、この孔中に微細コイルを
捩じ込んで構成することができる。この微細コイ
ルは、積層したグリーンシートの焼成温度に耐え
られるようなタングステンやモリブデン等により
構成することが好適である。又この微細コイルと
配線11,12との接続は、例えば、グリーンシ
ート上に配線11,12を形成する導電性塗料を
塗布し、接続用孔に捩じ込んだ微細コイルの端部
にも導電性塗料を塗布して焼成すれば良いことに
なる。
コイルのインダクタンスLは、
L=(2πRN)2/lμrK×10-7
で表される。なお、Rはコイルの半径、Nは巻
数、lはコイルの長さ、μrは比透磁率、Kは長岡
係数である。
数、lはコイルの長さ、μrは比透磁率、Kは長岡
係数である。
例えば、配線11,12間の絶縁基板10の厚
さに対応して、コイルの長さl=2500μm、接続
用の孔の直径に対応して、コイルの半径Rを
1000μm、巻数Nを10とすると、インダクタンス
Lは120nHとなり、1.8GHzでは、インピーダンス
Zは1.3KΩとなるから、電源供給用の配線に、
ノイズ除去等のインダクタンスを挿入した場合と
同じ構成となり、高速動作の半導体集積回路チツ
プへの電源供給用として、耐雑音特性を向上する
ことができる。
さに対応して、コイルの長さl=2500μm、接続
用の孔の直径に対応して、コイルの半径Rを
1000μm、巻数Nを10とすると、インダクタンス
Lは120nHとなり、1.8GHzでは、インピーダンス
Zは1.3KΩとなるから、電源供給用の配線に、
ノイズ除去等のインダクタンスを挿入した場合と
同じ構成となり、高速動作の半導体集積回路チツ
プへの電源供給用として、耐雑音特性を向上する
ことができる。
以上説明したように、本発明は、半導体集積回
路チツプ18を多層配線基板15に搭載してキヤ
ツプ21により気密封止した高速集積回路パツケ
ージに於いて、多層配線基板15に於ける高周波
信号が伝搬する配線1a,1b,1c間をスルー
ホールによるインダクタンス成分の小さい第1の
接続部4a,4bにより接続し、電源供給用の配
線2a,2b,2c間を、第1の接続部4a,4
bに比較して直径を小さくしてインダクタンス成
分を大きくするか、又は長さを長くしてインダク
タンス成分を大きくするか、或いは直径を小さく
すると共に長さを長くしてインダクタンス成分を
大きくしたスルーホールによる第2の接続部5
a,5bにより接続したものであり、多層配線基
板を製作する時に、配線の種類に対応して異なる
大きさの接続用孔を形成することになるが、高速
動作の半導体集積回路チツプ18の動作特性を阻
害することなく、電源供給並びに信号の入出力を
行わせることができる利点がある。
路チツプ18を多層配線基板15に搭載してキヤ
ツプ21により気密封止した高速集積回路パツケ
ージに於いて、多層配線基板15に於ける高周波
信号が伝搬する配線1a,1b,1c間をスルー
ホールによるインダクタンス成分の小さい第1の
接続部4a,4bにより接続し、電源供給用の配
線2a,2b,2c間を、第1の接続部4a,4
bに比較して直径を小さくしてインダクタンス成
分を大きくするか、又は長さを長くしてインダク
タンス成分を大きくするか、或いは直径を小さく
すると共に長さを長くしてインダクタンス成分を
大きくしたスルーホールによる第2の接続部5
a,5bにより接続したものであり、多層配線基
板を製作する時に、配線の種類に対応して異なる
大きさの接続用孔を形成することになるが、高速
動作の半導体集積回路チツプ18の動作特性を阻
害することなく、電源供給並びに信号の入出力を
行わせることができる利点がある。
第1図は本発明の実施例の要部断面図、第2図
は本発明の他の実施例の要部断面図、第3図は集
積回路パツケージの概略断面図である。 1a,1b,1c,2a,2b,2c,3a,
3b,11,12は配線、4a,4b,5a,5
bは接続部、6,10は絶縁基板、13はコイ
ル、15は多層配線基板、16,17は配線、1
8は半導体集積回路チツプ、19は接続線、20
は絶縁体、21はキヤツプである。
は本発明の他の実施例の要部断面図、第3図は集
積回路パツケージの概略断面図である。 1a,1b,1c,2a,2b,2c,3a,
3b,11,12は配線、4a,4b,5a,5
bは接続部、6,10は絶縁基板、13はコイ
ル、15は多層配線基板、16,17は配線、1
8は半導体集積回路チツプ、19は接続線、20
は絶縁体、21はキヤツプである。
Claims (1)
- 【特許請求の範囲】 1 半導体集積回路チツプを多層配線基板に搭載
してキヤツプにより気密封止した高速集積回路パ
ツケージに於いて、 前記多層配線基板の高周波信号が伝搬する配線
1a,1b,1c間を、スルーホールによるイン
ダクタンス成分の小さい第1の接続部4a,4b
により接続し、 電源供給用の配線2a,2b,2c間を、前記
第1の接続部4a,4bに比較して直径を小さく
するか又は長さを長くするかの何れか一方或いは
両方の構成としてインダクタンス成分を大きくし
たスルーホールによる第2の接続部5a,5bに
より接続した ことを特徴とする高速集積回路パツケージ。
Priority Applications (9)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60077549A JPS61239649A (ja) | 1985-04-13 | 1985-04-13 | 高速集積回路パツケ−ジ |
CA000505739A CA1249379A (en) | 1985-04-13 | 1986-04-03 | Integrated circuit device having stacked conductive layers connecting circuit elements therethrough |
KR1019860002694A KR900007299B1 (ko) | 1985-04-13 | 1986-04-09 | 회로소자 연결용 축적 도전층을 갖는 집적회로장치 |
EP86400782A EP0199635B1 (en) | 1985-04-13 | 1986-04-11 | Integrated circuit device having stacked conductive layers connecting circuit elements therethrough |
AT86400782T ATE61696T1 (de) | 1985-04-13 | 1986-04-11 | Integrierte schaltungsanordnung mit gestapelten leiterschichten zum verbinden von schaltungselementen. |
DE8686400782T DE3678023D1 (de) | 1985-04-13 | 1986-04-11 | Integrierte schaltungsanordnung mit gestapelten leiterschichten zum verbinden von schaltungselementen. |
US07/214,838 US4827327A (en) | 1985-04-13 | 1988-07-05 | Integrated circuit device having stacked conductive layers connecting circuit elements therethrough |
SG456/92A SG45692G (en) | 1985-04-13 | 1992-04-24 | Integrated circuit device having stacked conductive layers connecting circuit elements therethrough |
HK469/92A HK46992A (en) | 1985-04-13 | 1992-06-25 | Integrated circuit device having stacked conductive layers connecting circuit elements therethrough |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60077549A JPS61239649A (ja) | 1985-04-13 | 1985-04-13 | 高速集積回路パツケ−ジ |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS61239649A JPS61239649A (ja) | 1986-10-24 |
JPH0325082B2 true JPH0325082B2 (ja) | 1991-04-05 |
Family
ID=13637092
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60077549A Granted JPS61239649A (ja) | 1985-04-13 | 1985-04-13 | 高速集積回路パツケ−ジ |
Country Status (9)
Country | Link |
---|---|
US (1) | US4827327A (ja) |
EP (1) | EP0199635B1 (ja) |
JP (1) | JPS61239649A (ja) |
KR (1) | KR900007299B1 (ja) |
AT (1) | ATE61696T1 (ja) |
CA (1) | CA1249379A (ja) |
DE (1) | DE3678023D1 (ja) |
HK (1) | HK46992A (ja) |
SG (1) | SG45692G (ja) |
Families Citing this family (58)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA1246755A (en) * | 1985-03-30 | 1988-12-13 | Akira Miyauchi | Semiconductor device |
US4945399A (en) * | 1986-09-30 | 1990-07-31 | International Business Machines Corporation | Electronic package with integrated distributed decoupling capacitors |
GB2197540B (en) * | 1986-11-12 | 1991-04-17 | Murata Manufacturing Co | A circuit structure. |
US4922324A (en) * | 1987-01-20 | 1990-05-01 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit device |
JPH0682945B2 (ja) * | 1987-02-25 | 1994-10-19 | 三菱電機株式会社 | 半導体装置 |
JP2507476B2 (ja) * | 1987-09-28 | 1996-06-12 | 株式会社東芝 | 半導体集積回路装置 |
JPH0756887B2 (ja) * | 1988-04-04 | 1995-06-14 | 株式会社日立製作所 | 半導体パッケージ及びそれを用いたコンピュータ |
US5170245A (en) * | 1988-06-15 | 1992-12-08 | International Business Machines Corp. | Semiconductor device having metallic interconnects formed by grit blasting |
US5014114A (en) * | 1988-09-30 | 1991-05-07 | Harris Corporation | High speed, high density semiconductor memory package with chip level repairability |
US5122475A (en) * | 1988-09-30 | 1992-06-16 | Harris Corporation | Method of making a high speed, high density semiconductor memory package with chip level repairability |
US5099306A (en) * | 1988-11-21 | 1992-03-24 | Honeywell Inc. | Stacked tab leadframe assembly |
US5089878A (en) * | 1989-06-09 | 1992-02-18 | Lee Jaesup N | Low impedance packaging |
WO1991008014A1 (en) * | 1989-11-28 | 1991-06-13 | Leocor, Inc. | Low profile catheter |
US5157477A (en) * | 1990-01-10 | 1992-10-20 | International Business Machines Corporation | Matched impedance vertical conductors in multilevel dielectric laminated wiring |
US5184210A (en) * | 1990-03-20 | 1993-02-02 | Digital Equipment Corporation | Structure for controlling impedance and cross-talk in a printed circuit substrate |
ATE120883T1 (de) * | 1990-05-28 | 1995-04-15 | Siemens Ag | Ic-gehäuse, bestehend aus drei beschichteten dielektrischen platten. |
US5132613A (en) * | 1990-11-30 | 1992-07-21 | International Business Machines Corporation | Low inductance side mount decoupling test structure |
JP3009788B2 (ja) * | 1991-11-15 | 2000-02-14 | 日本特殊陶業株式会社 | 集積回路用パッケージ |
DE69232912T2 (de) * | 1991-11-28 | 2003-12-24 | Toshiba Kawasaki Kk | Halbleitergehäuse |
JPH06291521A (ja) * | 1992-04-21 | 1994-10-18 | Matsushita Electric Ind Co Ltd | 高周波多層集積回路 |
JPH06291520A (ja) * | 1992-04-03 | 1994-10-18 | Matsushita Electric Ind Co Ltd | 高周波多層集積回路 |
US5422615A (en) * | 1992-09-14 | 1995-06-06 | Hitachi, Ltd. | High frequency circuit device |
GB9219661D0 (en) * | 1992-09-17 | 1992-10-28 | Oxley Dev Company Limited | Ceramic microwave packages |
DE69309306T2 (de) * | 1992-12-15 | 1997-09-04 | Du Pont | Elektrische Verbindungsstrukturen |
US5338970A (en) * | 1993-03-24 | 1994-08-16 | Intergraph Corporation | Multi-layered integrated circuit package with improved high frequency performance |
DE19520700B4 (de) * | 1994-06-09 | 2004-09-09 | Samsung Electronics Co., Ltd., Suwon | Halbleiterbausteinanordnung |
US5698895A (en) * | 1994-06-23 | 1997-12-16 | Cubic Memory, Inc. | Silicon segment programming method and apparatus |
US5675180A (en) | 1994-06-23 | 1997-10-07 | Cubic Memory, Inc. | Vertical interconnect process for silicon segments |
US6080596A (en) * | 1994-06-23 | 2000-06-27 | Cubic Memory Inc. | Method for forming vertical interconnect process for silicon segments with dielectric isolation |
US5891761A (en) * | 1994-06-23 | 1999-04-06 | Cubic Memory, Inc. | Method for forming vertical interconnect process for silicon segments with thermally conductive epoxy preform |
US6124633A (en) * | 1994-06-23 | 2000-09-26 | Cubic Memory | Vertical interconnect process for silicon segments with thermally conductive epoxy preform |
US6486528B1 (en) | 1994-06-23 | 2002-11-26 | Vertical Circuits, Inc. | Silicon segment programming apparatus and three terminal fuse configuration |
US5657206A (en) * | 1994-06-23 | 1997-08-12 | Cubic Memory, Inc. | Conductive epoxy flip-chip package and method |
US6255726B1 (en) | 1994-06-23 | 2001-07-03 | Cubic Memory, Inc. | Vertical interconnect process for silicon segments with dielectric isolation |
JPH08288462A (ja) * | 1995-04-14 | 1996-11-01 | Mitsubishi Electric Corp | 半導体集積回路装置 |
US5623160A (en) * | 1995-09-14 | 1997-04-22 | Liberkowski; Janusz B. | Signal-routing or interconnect substrate, structure and apparatus |
US9054094B2 (en) | 1997-04-08 | 2015-06-09 | X2Y Attenuators, Llc | Energy conditioning circuit arrangement for integrated circuit |
US7336468B2 (en) | 1997-04-08 | 2008-02-26 | X2Y Attenuators, Llc | Arrangement for energy conditioning |
US7321485B2 (en) | 1997-04-08 | 2008-01-22 | X2Y Attenuators, Llc | Arrangement for energy conditioning |
US6191475B1 (en) * | 1997-11-26 | 2001-02-20 | Intel Corporation | Substrate for reducing electromagnetic interference and enclosure |
US6057600A (en) * | 1997-11-27 | 2000-05-02 | Kyocera Corporation | Structure for mounting a high-frequency package |
US6483406B1 (en) * | 1998-07-31 | 2002-11-19 | Kyocera Corporation | High-frequency module using slot coupling |
JP3339473B2 (ja) * | 1999-08-26 | 2002-10-28 | 日本電気株式会社 | パッケージ基板、該パッケージ基板を備える半導体装置及びそれらの製造方法 |
JP3500335B2 (ja) * | 1999-09-17 | 2004-02-23 | 株式会社東芝 | 高周波回路装置 |
US6414396B1 (en) | 2000-01-24 | 2002-07-02 | Amkor Technology, Inc. | Package for stacked integrated circuits |
JP3455498B2 (ja) * | 2000-05-31 | 2003-10-14 | 株式会社東芝 | プリント基板および情報処理装置 |
US7705432B2 (en) * | 2004-04-13 | 2010-04-27 | Vertical Circuits, Inc. | Three dimensional six surface conformal die coating |
US7215018B2 (en) | 2004-04-13 | 2007-05-08 | Vertical Circuits, Inc. | Stacked die BGA or LGA component assembly |
KR20070107747A (ko) | 2005-03-01 | 2007-11-07 | 엑스2와이 어테뉴에이터스, 엘.엘.씨 | 공통평면의 도전체를 갖는 조절기 |
DE102005062344B4 (de) * | 2005-12-23 | 2010-08-19 | Infineon Technologies Ag | Halbleiterbauteil für Hochfrequenzanwendungen und Verfahren zur Herstellung eines derartigen Halbleiterbauteils |
US7768098B2 (en) * | 2006-06-23 | 2010-08-03 | Triquint Semiconductor, Inc. | Integrated low inductance interconnect for RF integrated circuits |
KR100802358B1 (ko) * | 2006-08-22 | 2008-02-13 | 주식회사 이엠따블유안테나 | 전송선로 |
JP5031696B2 (ja) * | 2008-08-22 | 2012-09-19 | シャープ株式会社 | 半導体装置 |
US9911715B2 (en) * | 2013-12-20 | 2018-03-06 | Cyntec Co., Ltd. | Three-dimensional package structure and the method to fabricate thereof |
US9818694B2 (en) | 2015-11-16 | 2017-11-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Active atomic reservoir for enhancing electromigration reliability in integrated circuits |
US10950540B2 (en) | 2015-11-16 | 2021-03-16 | Taiwan Semiconductor Manufacturing Co., Ltd. | Enhancing integrated circuit density with active atomic reservoir |
US9929087B2 (en) | 2015-11-16 | 2018-03-27 | Taiwan Semiconductor Manufacturing Co., Ltd | Enhancing integrated circuit density with active atomic reservoir |
KR101806198B1 (ko) * | 2016-12-30 | 2017-12-08 | 연세대학교 산학협력단 | 무선 주파수 코일 및 이를 포함하는 의료용 영상 장치 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4416858Y1 (ja) * | 1967-04-03 | 1969-07-21 | ||
JPS5028959A (ja) * | 1973-07-16 | 1975-03-24 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1239678A (ja) * | 1968-12-04 | 1971-07-21 | ||
US4221047A (en) * | 1979-03-23 | 1980-09-09 | International Business Machines Corporation | Multilayered glass-ceramic substrate for mounting of semiconductor device |
US4320438A (en) * | 1980-05-15 | 1982-03-16 | Cts Corporation | Multi-layer ceramic package |
US4302625A (en) * | 1980-06-30 | 1981-11-24 | International Business Machines Corp. | Multi-layer ceramic substrate |
US4608592A (en) * | 1982-07-09 | 1986-08-26 | Nec Corporation | Semiconductor device provided with a package for a semiconductor element having a plurality of electrodes to be applied with substantially same voltage |
US4498122A (en) * | 1982-12-29 | 1985-02-05 | At&T Bell Laboratories | High-speed, high pin-out LSI chip package |
US4541035A (en) * | 1984-07-30 | 1985-09-10 | General Electric Company | Low loss, multilevel silicon circuit board |
-
1985
- 1985-04-13 JP JP60077549A patent/JPS61239649A/ja active Granted
-
1986
- 1986-04-03 CA CA000505739A patent/CA1249379A/en not_active Expired
- 1986-04-09 KR KR1019860002694A patent/KR900007299B1/ko not_active IP Right Cessation
- 1986-04-11 AT AT86400782T patent/ATE61696T1/de not_active IP Right Cessation
- 1986-04-11 DE DE8686400782T patent/DE3678023D1/de not_active Expired - Fee Related
- 1986-04-11 EP EP86400782A patent/EP0199635B1/en not_active Expired - Lifetime
-
1988
- 1988-07-05 US US07/214,838 patent/US4827327A/en not_active Expired - Fee Related
-
1992
- 1992-04-24 SG SG456/92A patent/SG45692G/en unknown
- 1992-06-25 HK HK469/92A patent/HK46992A/xx unknown
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4416858Y1 (ja) * | 1967-04-03 | 1969-07-21 | ||
JPS5028959A (ja) * | 1973-07-16 | 1975-03-24 |
Also Published As
Publication number | Publication date |
---|---|
DE3678023D1 (de) | 1991-04-18 |
ATE61696T1 (de) | 1991-03-15 |
EP0199635B1 (en) | 1991-03-13 |
EP0199635A2 (en) | 1986-10-29 |
EP0199635A3 (en) | 1987-11-19 |
CA1249379A (en) | 1989-01-24 |
KR900007299B1 (ko) | 1990-10-08 |
US4827327A (en) | 1989-05-02 |
SG45692G (en) | 1992-06-12 |
JPS61239649A (ja) | 1986-10-24 |
KR860008600A (ko) | 1986-11-17 |
HK46992A (en) | 1992-07-03 |
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