JP7042165B2 - プラズマエッチング方法及びプラズマダイシング方法 - Google Patents

プラズマエッチング方法及びプラズマダイシング方法 Download PDF

Info

Publication number
JP7042165B2
JP7042165B2 JP2018107506A JP2018107506A JP7042165B2 JP 7042165 B2 JP7042165 B2 JP 7042165B2 JP 2018107506 A JP2018107506 A JP 2018107506A JP 2018107506 A JP2018107506 A JP 2018107506A JP 7042165 B2 JP7042165 B2 JP 7042165B2
Authority
JP
Japan
Prior art keywords
etching
plasma
main
silicon
bsm
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2018107506A
Other languages
English (en)
Japanese (ja)
Other versions
JP2018207109A5 (https=
JP2018207109A (ja
Inventor
ジェイ アンセル オリバー
ハニチネツ マルチン
ホプキンズ ジャネット
Original Assignee
エスピーティーエス テクノロジーズ リミティド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by エスピーティーエス テクノロジーズ リミティド filed Critical エスピーティーエス テクノロジーズ リミティド
Publication of JP2018207109A publication Critical patent/JP2018207109A/ja
Publication of JP2018207109A5 publication Critical patent/JP2018207109A5/ja
Application granted granted Critical
Publication of JP7042165B2 publication Critical patent/JP7042165B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • H10P50/244—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials comprising alternated and repeated etching and passivation steps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • H10P50/267—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00—Cutting or separating of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7402—Wafer tapes, e.g. grinding or dicing support tapes

Landscapes

  • Drying Of Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Dicing (AREA)
JP2018107506A 2017-06-05 2018-06-05 プラズマエッチング方法及びプラズマダイシング方法 Active JP7042165B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB1708927.7 2017-06-05
GBGB1708927.7A GB201708927D0 (en) 2017-06-05 2017-06-05 Methods of plasma etching and plasma dicing

Publications (3)

Publication Number Publication Date
JP2018207109A JP2018207109A (ja) 2018-12-27
JP2018207109A5 JP2018207109A5 (https=) 2021-07-26
JP7042165B2 true JP7042165B2 (ja) 2022-03-25

Family

ID=59350031

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2018107506A Active JP7042165B2 (ja) 2017-06-05 2018-06-05 プラズマエッチング方法及びプラズマダイシング方法

Country Status (7)

Country Link
US (1) US10872775B2 (https=)
EP (1) EP3413341B1 (https=)
JP (1) JP7042165B2 (https=)
KR (1) KR102364952B1 (https=)
CN (1) CN108987342B (https=)
GB (1) GB201708927D0 (https=)
TW (1) TWI791531B (https=)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10818551B2 (en) * 2019-01-09 2020-10-27 Semiconductor Components Industries, Llc Plasma die singulation systems and related methods
US20210118734A1 (en) * 2019-10-22 2021-04-22 Semiconductor Components Industries, Llc Plasma-singulated, contaminant-reduced semiconductor die
KR102824210B1 (ko) * 2019-10-28 2025-06-25 삼성전자주식회사 반도체 소자 및 제조방법
US11721586B2 (en) * 2019-12-19 2023-08-08 Nxp B.V. Method and system for regulating plasma dicing rates
US11658103B2 (en) * 2020-09-11 2023-05-23 Qualcomm Incorporated Capacitor interposer layer (CIL) chiplet design with conformal die edge pattern around bumps
TWI771893B (zh) * 2021-02-03 2022-07-21 國立陽明交通大學 陣列式晶片的切割方法
CN114724948B (zh) * 2022-03-30 2025-11-04 青岛惠科微电子有限公司 硅片的湿法蚀刻方法和装置
US20240071828A1 (en) * 2022-08-31 2024-02-29 Texas Instruments Incorporated Methods of separating semiconductor dies
US20240258112A1 (en) * 2023-01-30 2024-08-01 Texas Instruments Incorporated Multi-loop time varying bosch process for 2-dimensional small cd high aspect ratio deep silicon trench etching

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007311584A (ja) 2006-05-19 2007-11-29 Sanyo Electric Co Ltd 半導体装置の製造方法
JP2008217384A (ja) 2007-03-05 2008-09-18 Hitachi Ltd 回路チップ及びその製造方法、並びにこれを搭載したｒｆｉｄ回路装置
JP2010259160A (ja) 2009-04-22 2010-11-11 Sumitomo Precision Prod Co Ltd 発電装置およびシリコン片の製造方法
JP2012018956A (ja) 2010-07-06 2012-01-26 Canon Inc 配線基板の製造方法
JP2013165100A (ja) 2012-02-09 2013-08-22 Seiko Epson Corp 半導体装置、半導体装置の製造方法、回路装置、電子機器
JP2015153874A (ja) 2014-02-13 2015-08-24 セイコーインスツル株式会社 半導体装置およびその製造方法
JP2016018838A (ja) 2014-07-07 2016-02-01 株式会社リコー シリコン基板の加工方法
JP2017073439A (ja) 2015-10-06 2017-04-13 株式会社ディスコ デバイスの製造方法

Family Cites Families (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5620525A (en) * 1990-07-16 1997-04-15 Novellus Systems, Inc. Apparatus for supporting a substrate and introducing gas flow doximate to an edge of the substrate
US5514247A (en) * 1994-07-08 1996-05-07 Applied Materials, Inc. Process for plasma etching of vias
EP0731501A1 (en) * 1995-03-08 1996-09-11 International Business Machines Corporation Method for plasma etching an oxide/polycide structure
US6846746B2 (en) 2002-05-01 2005-01-25 Applied Materials, Inc. Method of smoothing a trench sidewall after a deep trench silicon etch process
DE102007009913B4 (de) * 2007-02-28 2012-10-18 Advanced Micro Devices, Inc. Plasmaätzprozess mit hoher Ausbeute für Zwischenschichtdielektrika
CN101925983A (zh) * 2007-12-21 2010-12-22 苏威氟有限公司 用于生产微机电系统的方法
US8871105B2 (en) * 2011-05-12 2014-10-28 Lam Research Corporation Method for achieving smooth side walls after Bosch etch process
US8450188B1 (en) 2011-08-02 2013-05-28 Micro Processing Technology, Inc. Method of removing back metal from an etched semiconductor scribe street
GB2499816A (en) 2012-02-29 2013-09-04 Oxford Instr Nanotechnology Tools Ltd Controlling deposition and etching in a chamber with fine time control of parameters and gas flow
US8993414B2 (en) * 2012-07-13 2015-03-31 Applied Materials, Inc. Laser scribing and plasma etch for high die break strength and clean sidewall
US8664089B1 (en) * 2012-08-20 2014-03-04 Semiconductor Components Industries, Llc Semiconductor die singulation method
US9034733B2 (en) 2012-08-20 2015-05-19 Semiconductor Components Industries, Llc Semiconductor die singulation method
US9368404B2 (en) 2012-09-28 2016-06-14 Plasma-Therm Llc Method for dicing a substrate with back metal
US9153493B1 (en) 2013-01-16 2015-10-06 Micro Processing Technology, Inc. System for separating devices from a semiconductor wafer
US8980726B2 (en) 2013-01-25 2015-03-17 Applied Materials, Inc. Substrate dicing by laser ablation and plasma etch damage removal for ultra-thin wafers
WO2014137905A2 (en) * 2013-03-06 2014-09-12 Plasma-Therm, Llc Method and apparatus for plasma dicing a semi-conductor wafer
US20150011073A1 (en) * 2013-07-02 2015-01-08 Wei-Sheng Lei Laser scribing and plasma etch for high die break strength and smooth sidewall
US9224615B2 (en) * 2013-09-11 2015-12-29 Taiwan Semiconductor Manufacturing Co., Ltd. Noble gas bombardment to reduce scallops in bosch etching
US8906745B1 (en) 2013-09-12 2014-12-09 Micro Processing Technology, Inc. Method using fluid pressure to remove back metal from semiconductor wafer scribe streets
US9460966B2 (en) * 2013-10-10 2016-10-04 Applied Materials, Inc. Method and apparatus for dicing wafers having thick passivation polymer layer
CN104576506A (zh) 2013-10-22 2015-04-29 中微半导体设备(上海)有限公司 一种刻蚀硅通孔的方法
CN103646917B (zh) * 2013-11-28 2016-04-13 中微半导体设备(上海)有限公司 硅通孔形成方法
US9312177B2 (en) * 2013-12-06 2016-04-12 Applied Materials, Inc. Screen print mask for laser scribe and plasma etch wafer dicing process
US9275902B2 (en) * 2014-03-26 2016-03-01 Applied Materials, Inc. Dicing processes for thin wafers with bumps on wafer backside
EP3012857A1 (en) * 2014-10-21 2016-04-27 ams AG Method of producing an opening with smooth vertical sidewall in a semiconductor substrate
JP6566812B2 (ja) * 2015-09-25 2019-08-28 三菱電機株式会社 炭化珪素半導体装置及びその製造方法
JP6476419B2 (ja) * 2016-02-04 2019-03-06 パナソニックＩｐマネジメント株式会社 素子チップの製造方法および素子チップ
JP6476418B2 (ja) * 2016-02-04 2019-03-06 パナソニックＩｐマネジメント株式会社 素子チップの製造方法および電子部品実装構造体の製造方法
JP6575874B2 (ja) * 2016-03-09 2019-09-18 パナソニックＩｐマネジメント株式会社 素子チップの製造方法
JP6604476B2 (ja) * 2016-03-11 2019-11-13 パナソニックＩｐマネジメント株式会社 素子チップの製造方法
JP2018056502A (ja) * 2016-09-30 2018-04-05 株式会社ディスコ デバイスウエーハの加工方法
JP6524562B2 (ja) * 2017-02-23 2019-06-05 パナソニックＩｐマネジメント株式会社 素子チップおよびその製造方法

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007311584A (ja) 2006-05-19 2007-11-29 Sanyo Electric Co Ltd 半導体装置の製造方法
JP2008217384A (ja) 2007-03-05 2008-09-18 Hitachi Ltd 回路チップ及びその製造方法、並びにこれを搭載したｒｆｉｄ回路装置
JP2010259160A (ja) 2009-04-22 2010-11-11 Sumitomo Precision Prod Co Ltd 発電装置およびシリコン片の製造方法
JP2012018956A (ja) 2010-07-06 2012-01-26 Canon Inc 配線基板の製造方法
JP2013165100A (ja) 2012-02-09 2013-08-22 Seiko Epson Corp 半導体装置、半導体装置の製造方法、回路装置、電子機器
JP2015153874A (ja) 2014-02-13 2015-08-24 セイコーインスツル株式会社 半導体装置およびその製造方法
JP2016018838A (ja) 2014-07-07 2016-02-01 株式会社リコー シリコン基板の加工方法
JP2017073439A (ja) 2015-10-06 2017-04-13 株式会社ディスコ デバイスの製造方法

Also Published As

Publication number Publication date
CN108987342B (zh) 2023-07-18
GB201708927D0 (en) 2017-07-19
KR102364952B1 (ko) 2022-02-17
KR20180133231A (ko) 2018-12-13
CN108987342A (zh) 2018-12-11
US20180350615A1 (en) 2018-12-06
EP3413341A1 (en) 2018-12-12
EP3413341B1 (en) 2022-04-27
TW201903889A (zh) 2019-01-16
TWI791531B (zh) 2023-02-11
US10872775B2 (en) 2020-12-22
JP2018207109A (ja) 2018-12-27

Similar Documents

Publication Publication Date Title
JP7042165B2 (ja) プラズマエッチング方法及びプラズマダイシング方法
US5972781A (en) Method for producing semiconductor chips
US9224615B2 (en) Noble gas bombardment to reduce scallops in bosch etching
JP4662717B2 (ja) 基板をエッチングする方法
JP7123550B2 (ja) 表面平滑化方法
TWI416609B (zh) 電漿處理系統之用於將遮罩底切及凹口減至最少的方法
CN104465513B (zh) 半导体器件和用于制造半导体器件的方法
JP6387131B2 (ja) プラズマ加工方法及びこの方法を用いて製造された基板
JP2018207109A5 (https=)
JP5967488B2 (ja) ＳｉＣ基板のエッチング方法
EP2717298B1 (en) Method of plasma etching
US20210159082A1 (en) Protective layers and methods of formation during plasma etching processes
JP2019110272A (ja) 素子チップの製造方法
CN112701062A (zh) 等离子体切单的、污染物减少的半导体管芯
TWI389865B (zh) 用於電漿處理系統之刻痕停止脈波程序
JP2018137483A (ja) プラズマ加工方法及びこの方法を用いて製造された基板
US20250210362A1 (en) Methods of treating a semiconductor substrate and apparatus
JP2022089536A (ja) 素子チップの製造方法
US10056297B1 (en) Modified plasma dicing process to improve back metal cleaving
JP2011526841A (ja) 改善された均一性を有する微小ポストおよびそれを製作する方法
Evertsen et al. Novel UV-USP Laser Grooving and Plasma Dicing Separation Schemes for Next Generation Advanced Packaging
KR20070022355A (ko) 초박형 다이 및 이를 제조하는 방법
TW202522561A (zh) 半導體元件之晶粒背側輪廓
JP2017204549A (ja) 半導体基板およびその製造方法
JP2017079273A (ja) プラズマ処理方法

Legal Events

Date Code Title Description
RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20200121

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20200128

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20210526

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20210526

A871 Explanation of circumstances concerning accelerated examination

Free format text: JAPANESE INTERMEDIATE CODE: A871

Effective date: 20210526

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20210629

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20210922

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20211109

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20220120

C60 Trial request (containing other claim documents, opposition documents)

Free format text: JAPANESE INTERMEDIATE CODE: C60

Effective date: 20220120

A911 Transfer to examiner for re-examination before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A911

Effective date: 20220131

C21 Notice of transfer of a case for reconsideration by examiners before appeal proceedings

Free format text: JAPANESE INTERMEDIATE CODE: C21

Effective date: 20220201

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20220215

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20220314

R150 Certificate of patent or registration of utility model

Ref document number: 7042165

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250