JP6520437B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP6520437B2 JP6520437B2 JP2015119233A JP2015119233A JP6520437B2 JP 6520437 B2 JP6520437 B2 JP 6520437B2 JP 2015119233 A JP2015119233 A JP 2015119233A JP 2015119233 A JP2015119233 A JP 2015119233A JP 6520437 B2 JP6520437 B2 JP 6520437B2
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- Prior art keywords
- lead frame
- terminal
- electrode
- main surface
- disposed
- Prior art date
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- 239000004065 semiconductor Substances 0.000 title claims description 59
- 239000011347 resin Substances 0.000 claims description 46
- 229920005989 resin Polymers 0.000 claims description 46
- 238000007789 sealing Methods 0.000 claims description 46
- 239000000758 substrate Substances 0.000 claims description 27
- 229910000679 solder Inorganic materials 0.000 description 24
- 230000017525 heat dissipation Effects 0.000 description 13
- 238000010586 diagram Methods 0.000 description 9
- 238000001816 cooling Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- 230000005669 field effect Effects 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
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- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
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- H—ELECTRICITY
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- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Description
実施の形態1.
図1に実施の形態1を示す。図1(a)には平面図(上面の封止樹脂は不図示)、図1(b)にはA−A’断面図、図1(c)には背面図を示す。
実施の形態2.
図2に実施の形態2を示す。図2(a)には平面図(上面の封止樹脂は不図示)、図2(b)にはB−B’断面図、図2(c)には背面図を示す。
実施の形態3.
図3には実施の形態3を示す。図3(a)には平面図(上面の封止樹脂は不図示)、図3(b)にはC−C’断面図、図3(c)には背面図を示す。
実施の形態4.
図4は実施の形態4を示す。図4(a)には平面図(上面の封止樹脂は不図示)、図4(b)にはD−D’断面図、図4(c)には背面図を示す。
実施の形態5.
図5は実施の形態5を示す。図5(a)には平面図(上面の封止樹脂は不図示)、図5(b)にはE−E’断面図、図5(c)には背面図を示す。
実施の形態6.
図6に実施の形態6を示す。図6(a)には平面図(上面の封止樹脂は不図示)、図6(b)にはF−F’断面図、図6(c)には背面図、図6(d)には基板への接続図を示す。
実施の形態7.
図7に実施の形態7を示す。図7(a)には平面図(上面の封止樹脂は不図示)、図7(b)にはG−G’断面図、図7(c)には背面図、図7(d)には基板への接続図を示す。
実施の形態8.
図8に実施の形態8を示す。図8(a)には平面図(上面の封止樹脂は不図示)、図8(b)にはH−H’断面図、図8(c)には背面図、図8(d)には基板への接続図を示す。
実施の形態9.
図9に実施の形態9を示す。図9(a)には平面図(上面の封止樹脂は不図示)、図9(b)にはI−I’断面図、図9(c)には背面図、図9(d)には基板への接続図を示
す。
実施の形態10.
図10に実施の形態10を示す。図10(a)には平面図(上面の封止樹脂は不図示)、図10(b)にはJ−J’断面図、図10(c)には背面図、図10(d)には基板への接続図を示す。
実施の形態11.
図11に実施の形態11を示す。図11(a)には平面図(上面の封止樹脂は不図示)、図11(b)にはK−K’断面図、図11(c)には背面図、図11(d)には基板への接続図を示す。
実施の形態12.
図12に実施の形態12を示す。図12(a)には平面図(上面の封止樹脂は不図示)、図12(b)にはL−L’断面図、図12(c)には背面図、図12(d)には基板への接続図を示す。
実施の形態13.
図13に実施の形態13を示す。図13(a)には平面図(上面の封止樹脂は不図示)、図13(b)にはM−M’断面図、図13(c)には背面図、図13(d)には基板への接続図を示す。
実施の形態14.
図14に実施の形態14を示す。図14(a)には平面図(上面の封止樹脂は不図示)、図14(b)にはN−N’断面図、図14(c)には背面図、図14(d)には基板への接続図を示す。
1a、1a-1、1a−2 アノード電極
1b、1b-1、1b−2 カソード電極
2 MOSFETチップ
2a ゲート電極
2b ソース電極
2c ドレイン電極
3、23、25、33、43、53、63、73 第1リードフレーム
4、24、26、34、44、54、64、74 第2リードフレーム
5、45、55 第3リードフレーム
6 ボンディングワイヤ
7 IGBTチップ
7a ゲート電極
7b エミッタ電極
7c コレクタ電極
8 FWDチップ
8a アノード電極
8b カソード電極
9 封止樹脂
11、11−1、11−2 カソード端子
12、12−1、12−2 アノード端子
13、13−1 ドレイン端子
14、14a、14b、14a−1、14b−1 ソース端子
15、15−1 ゲート端子
16、16−1 コレクタ端子
17、17a、17b、17a−1、17b−1 エミッタ端子
18 スルーホール
20 基板
21 配線パターン
201 ダイオード
202 MOSFET
301 ダイオード素子
302 カソード端子
303 アノード端子
401 MOFET素子
402 ゲート端子
403 ドレイン端子
404 ソース端子
500 配線パターン
Claims (11)
- 第1リードフレームと、
第2リードフレームと、
第3リードフレームと、を有する半導体装置において、
前記第1リードフレームには第1端子と、
前記第2リードフレームには第2端子と、を備え、
前記第1リードフレームの主面上には第1半導体チップと、
前記第2リードフレームの主面上には第2半導体チップと、を備え、
前記第1半導体チップの表面に配置された第1電極はボンディングワイヤによって前記第2リードフレームの前記主面上に電気的に接続され、
前記第2半導体チップの表面には第2電極と第3電極を有し、
前記第2電極はボンディングワイヤによって第3端子、および第4端子に電気的に接続 され、
前記第3電極はボンディングワイヤによって第5端子に電気的に接続され、
前記第1電極はボンディングワイヤによって前記第3リードフレームの主面に接続され、
前記第3リードフレームの前記主面はボンディングワイヤによって前記第2リードフレームの前記主面に接続し、
前記第1リードフレームの他方の主面と前記第2リードフレームの他方の主面と前記第3リードフレームの他方の主面は封止樹脂から露出するように配置されていることを特徴とする半導体装置。 - 前記第1端子、前記第2端子、前記第3端子、前記第4端子、および前記第5端子は前記封止樹脂から露出するように配置されていることを特徴とする請求項1に記載の半導体装置。
- 第4リードフレームと、
第5リードフレームと、
第6リードフレームと、を有する半導体装置において、
前記第4リードフレームには第6端子と、
前記第5リードフレームには第7端子と、を備え、
前記第4リードフレームの主面上には第3半導体チップと、
前記第5リードフレームの主面上には第4半導体チップ、および第5半導体チップと、を備え、
前記第3半導体チップの表面に配置された第4電極はボンディングワイヤによって前記第5リードフレームの前記主面上に電気的に接続され、
前記第4半導体チップの表面には第5電極と第6電極と、
前記第5半導体チップの表面には第7電極と、を有し、
前記第5電極はボンディングワイヤによって第8端子、および第9端子に電気的に接続され、
前記第6電極はボンディングワイヤによって第10端子に電気的に接続され、
前記第7電極はボンディングワイヤによって前記第5電極に電気的に接続され、
前記第4電極はボンディングワイヤによって前記第6リードフレームの主面に接続され、
前記第6リードフレームの前記主面はボンディングワイヤによって前記第5リードフレームの前記主面に接続し、
前記第4リードフレームの他方の主面と前記第5リードフレームの他方の主面と前記第6リードフレームの他方の主面は封止樹脂から露出するように配置されていることを特徴とする半導体装置。 - 前記第6端子、前記第7端子、前記第8端子、前記第9端子、および前記第10端子は前記封止樹脂から露出するように配置されていることを特徴とする請求項3に記載の半導体装置。
- 前記第1リードフレームと前記第2リードフレームとの間にスルーホールを備えること
を特徴とする請求項1に記載の半導体装置。 - 第7リードフレームと、
第8リードフレームと、
第9リードフレームと、を有する半導体装置において、
前記第8リードフレームには第11端子と、を備え、
前記第7リードフレームの主面上には第6半導体チップと、
前記第8リードフレームの主面上には第7半導体チップと、を備え、
前記第6半導体チップの表面に配置された第8電極はボンディングワイヤによって前記第8リードフレームの前記主面上に電気的に接続され、
前記第7半導体チップの表面には第9電極と第10電極を有し、
前記第9電極はボンディングワイヤによって第12端子、および第13端子に電気的に接続され、
前記第10電極はボンディングワイヤによって第14端子に電気的に接続され、
前記第8電極はボンディングワイヤによって前記第9リードフレームの主面に接続され、
前記第9リードフレームの前記主面はボンディングワイヤによって前記第8リードフレームの前記主面に接続し、
前記第7リードフレームの他方の主面と前記第8リードフレームの他方の主面と前記第9リードフレームの他方の主面は封止樹脂から露出するように配置されていることを特徴とする半導体装置。 - 前記第11端子、前記第12端子、前記第13端子、および前記第14端子は前記封止樹脂から露出するように配置されていることを特徴とする請求項6に記載の半導体装置。
- 前記第7リードフレームの前記他方の主面は基板上に配置された配線パターンと電気的に接続することを特徴とする請求項6に記載の半導体装置。
- 第10リードフレームと、
第11リードフレームと、を有する半導体装置において、
前記第11リードフレームには第15端子と、を備え、
前記第10リードフレームの主面上には第8半導体チップと、
前記第11リードフレームの主面上には第9半導体チップ、および第10半導体チップと、を備え、
前記第8半導体チップの表面に配置された第11電極はボンディングワイヤによって前記第11リードフレームの前記主面上に電気的に接続され、
前記第9半導体チップの表面には第12電極と第13電極と、
前記第10半導体チップの表面には第14電極と、を有し、
前記第12電極はボンディングワイヤによって第16端子、および第17端子に電気的に接続され、
前記第13電極はボンディングワイヤによって第18端子に電気的に接続され、
前記第14電極はボンディングワイヤによって前記第12電極に電気的に接続され、
前記第11電極はボンディングワイヤによって第12リードフレームの主面に接続され、
前記第12リードフレームの前記主面はボンディングワイヤによって前記第11リードフレームの前記主面に接続し、
前記第10リードフレームの他方の主面と前記第11リードフレームの他方の主面と前記第12リードフレームの他方の主面は封止樹脂から露出するように配置されていることを特徴とする半導体装置。 - 前記第15端子、前記第16端子、前記第17端子、および前記第18端子は前記封止樹脂から露出するように配置されていることを特徴とする請求項9に記載の
半導体装置。 - 前記第10リードフレームの前記他方の主面は基板上に配置された配線パターンと電気的に接続することを特徴とする請求項9に記載の半導体装置。
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JP6729474B2 (ja) * | 2017-04-24 | 2020-07-22 | 三菱電機株式会社 | 半導体装置 |
WO2019092839A1 (ja) * | 2017-11-10 | 2019-05-16 | 新電元工業株式会社 | 電子モジュール |
CN110534509A (zh) * | 2018-05-24 | 2019-12-03 | 苏州东微半导体有限公司 | 半导体功率器件 |
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CN109300889B (zh) * | 2018-10-30 | 2023-11-24 | 山东晶导微电子股份有限公司 | 一种ac-dc芯片与高压续流二极管集成芯片结构及电源模组 |
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JP7299751B2 (ja) | 2019-05-14 | 2023-06-28 | ローム株式会社 | 半導体装置 |
WO2021010210A1 (ja) | 2019-07-12 | 2021-01-21 | ローム株式会社 | 半導体装置 |
CN110660786B (zh) * | 2019-08-21 | 2024-02-27 | 深圳市晶导电子有限公司 | Led驱动电源的集成电路及其制造方法及led驱动电源 |
US20230077964A1 (en) | 2020-03-04 | 2023-03-16 | Rohm Co., Ltd. | Semiconductor device and method for manufacturing semiconductor device |
EP4156252A4 (en) * | 2020-05-19 | 2023-08-09 | Mitsubishi Electric Corporation | SEMICONDUCTOR MODULE |
WO2022070768A1 (ja) | 2020-10-02 | 2022-04-07 | ローム株式会社 | 半導体装置 |
KR102635228B1 (ko) * | 2021-12-28 | 2024-02-13 | 파워큐브세미 (주) | 절연 거리가 확보된 박막형 패키지 |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001308247A (ja) * | 2000-04-19 | 2001-11-02 | Nec Kansai Ltd | リードフレーム及び表面実装型半導体装置 |
DE10022268B4 (de) | 2000-05-08 | 2005-03-31 | Infineon Technologies Ag | Halbleiterbauelement mit zwei Halbleiterkörpern in einem gemeinsamen Gehäuse |
US6448643B2 (en) * | 2000-05-24 | 2002-09-10 | International Rectifier Corporation | Three commonly housed diverse semiconductor dice |
TW521416B (en) * | 2000-05-24 | 2003-02-21 | Int Rectifier Corp | Three commonly housed diverse semiconductor dice |
JP2002100723A (ja) * | 2000-09-21 | 2002-04-05 | Nec Kansai Ltd | 半導体装置 |
JP2002217416A (ja) * | 2001-01-16 | 2002-08-02 | Hitachi Ltd | 半導体装置 |
US8169062B2 (en) * | 2002-07-02 | 2012-05-01 | Alpha And Omega Semiconductor Incorporated | Integrated circuit package for semiconductior devices with improved electric resistance and inductance |
JP2006019700A (ja) * | 2004-06-03 | 2006-01-19 | Denso Corp | 半導体装置 |
JP2007294669A (ja) | 2006-04-25 | 2007-11-08 | Matsushita Electric Ind Co Ltd | 半導体装置 |
JP2008177179A (ja) | 2006-12-19 | 2008-07-31 | Hitachi Ltd | 半導体モジュール及び電力回収回路を有するプラズマディスプレイ装置 |
JP2008294384A (ja) * | 2007-04-27 | 2008-12-04 | Renesas Technology Corp | 半導体装置 |
JP4769784B2 (ja) * | 2007-11-05 | 2011-09-07 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
KR101448850B1 (ko) * | 2008-02-04 | 2014-10-14 | 페어차일드코리아반도체 주식회사 | 반도체 패키지 및 그 제조방법들 |
JP2010177619A (ja) | 2009-02-02 | 2010-08-12 | Sanken Electric Co Ltd | 半導体モジュール |
WO2011039795A1 (ja) * | 2009-09-29 | 2011-04-07 | パナソニック株式会社 | 半導体装置とその製造方法 |
US8426950B2 (en) * | 2010-01-13 | 2013-04-23 | Fairchild Semiconductor Corporation | Die package including multiple dies and lead orientation |
JP5623622B2 (ja) * | 2011-03-09 | 2014-11-12 | パナソニック株式会社 | 半導体装置 |
JP2014086536A (ja) | 2012-10-23 | 2014-05-12 | Renesas Electronics Corp | 半導体装置および半導体装置の製造方法 |
US9006870B2 (en) * | 2013-07-31 | 2015-04-14 | Alpha & Omega Semiconductor Inc. | Stacked multi-chip packaging structure and manufacturing method thereof |
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