TW521416B - Three commonly housed diverse semiconductor dice - Google Patents

Abstract

An SO-8 type package contains a control MOSFET die mounted on one lead frame section and a synchronous rectifier die comprising a synchronous MOSFET and Schottky diode die is mounted on a second lead frame pad section. The die are interconnected through the lead frame pads and wire bonds to define a buck converter circuit and the die and lead frame pads are overmolded with a common insulation housing.

Description

521416 A7 B7 Five invention descriptions (The present invention is about semiconductor devices, and more specifically about devices. A new type of rabbit can be implanted and fixed to multiple grains with different sizes and different joint surface patterns. Yu-common grains 'Blocks' and another die are fixed in another-die pads, all placed in a common package or package. Many circuits such as DC-to-DC converters, synchronous converters, and the like require MOSFETs And most of the semiconductor components of Schottky diodes. These circuits are often used in portable electronic devices. M pieces are usually packaged separately and must be individually installed on a selective board. "The separately packaged components occupy a lot of space." Furthermore, 'each component generates heat, and it can interfere with the operation of the microprocessor if it is close to other components such as the micro-processing state. 凊 Refer to Figure 1, which shows a traditional Buck converter circuit, sometimes called a step-down converter , Which is typically used to reduce the voltage of integrated circuits and processors that are delivered to a portable electronic device or similar circuit board. For example, a circuit can be used to reduce one of the 12 volt DC input voltages 5 Volt DC (or 33 or 15 Volt DC in some cases) to drive an integrated circuit or other load (not shown). The circuit in Figure 1 is well known and uses an N-channel MOSFET 80 to A suitable control circuit connected to the MOSFET gate G implements the switching function. A Schottky diode 12 has its cathode connected to the drain D of the MOSFET 10, and is used in the usual pulse The frequency modulation-controlled MOSFET 10 allows the output current to flow into the inductor 13 and the capacitor 14 at the time of cut-off. U.S. Patent No. 5,814,884 discloses that one of the MOSFET and SCHOTT basic paper standards is applicable to the Chinese National Standard (CNS) A4 Specifications (210 X 297 mm) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 521416 A7 B7

V. Description of the invention (2 The diode is mounted on a common die block to reduce the board orientation, the number of components, and the package. It is expected that the board space required by multiple semiconductor devices will be reduced. 'To reduce the number of components and assembly costs in these power converters and other power subsystems for high-density applications. SUMMARY OF THE INVENTION According to one aspect of the present invention, a semiconductor device includes ... at least the first, first, And a third semiconductor die each having a conductive lead frame with an opposite surface including an individual electrode, including first and second discrete die bulk regions, and the first and second semiconductor die are disposed on the first A die pad, and the third semiconductor die is disposed on the second die pad; the first plurality of pins are integrated with and extend from the edge of the first die block; The second plurality of pins are integrated with and extend from one edge of the second die pad; the third plurality of pins are separated from each other and separated from the first die and the first die pad; Multiple bonding wires to connect the first half One surface of the conductor die is connected to at least one of the third plurality of pins; and a second plurality of bonding wires connects one surface of the third semiconductor die to at least one of the third plurality of pins. One; and a package for packaging the lead frame, semiconductor die, and bonding wiring, the first, second, and third pins extending beyond the periphery of the package for external connection. The package and the first, second, and third pins may be in accordance with a S0-8 packaging standard. The first and second pins may be disposed along a common edge of the package. Better The third and more pins are based on the paper standard (CNS) A4 (210 X 297)

521416 A7

One of the packages is opposite the common edge. According to another aspect of the present invention, the first and second crystal grains λ_M and τB are each provided with a source, a first and a second MOSFET crystal and the other ^, please do not find one Hedier

The contacting surfaces are the non-polar electrodes; and the individual source and sink electrodes of the first and second FET die are connected to individual ones of the third plurality of pins. Comparison: 'The second semiconductor grain system-Schottky diode grain, the opposite surface of the second f conductor grain includes the "Schottky_pole" which faces the first grain block region. The cathode electrode of the body such that the cathode electrode of the Schottky diode is electrically connected to the drain electrode of the _th crystal grain and electrically connected to the -multiple_, the Schottky The opposite surface of the diode crystal contains an anode electrode. Preferably, the anode electrode of the Schottky diode die is coupled to the source electrode of the first MOSFET die via a bonding wire. According to the further improvement of the invention, a single source wire connected to a discrete pin is used to control the Calvin contact point of the MOSFET; and the power connection between the grains is made inside the package instead of At the foot, the sfL can be reduced and the board can be installed. Other features and advantages of the present invention will become apparent from the following description of the invention with reference to the accompanying drawings. The simple precepts of the diagram. Figure 1 is a circuit diagram of a known Buck converter circuit. The Θ is a string of control MOSFETs and includes a parallel connection. I „------ (Please read the precautions on the back and write this page first) ·; line · 521416 A7 V. Description of the invention (4 Ministry of Intellectual Property-Bureau Staff Consumer Cooperation-Printing Company Circuit diagram of the MOSFET and Schottky diode_ synchronous rectifier; Figure 3 is an 8-pin that can be used to package both the MOSFET die and the Schottky die of Figure 2 according to an embodiment of the invention Perspective view of s〇_8 package; Figure 4 is a top view of the structure of the package of Figure 3 and the circuit of Figure 2; Figure 5 shows the lead frame of the package of Figures 3 and 4 with an enlarged illustration The top view shows the installation of the MOSFET and Schottky diode die fixed to the spaced apart leadframe pads and the bonding wiring between the die and the leadframe lead; and Figure 6 shows a further embodiment of the invention A detailed description of the preferred embodiment. Figure 2 shows the use of N-channel MOSFET 20 for A synchronous Barker converter circuit of a switching or control device, and one of the N-channel MOSFET 21 and a Schottky diode 22 which are used for "synchronous rectification" in parallel to replace the diode 12 in Fig. 丨, where the MOSFET 21 is in Control FE1: Turn-on period is 20. According to the present invention, MOSFET 20, MOSFET 21, and Schottky diode 22 are crystals packaged together in a common package as shown by the dotted line box 23 in FIG. This circuit is used to avoid the loss caused by the forward voltage drop of the diode 12 in Figure 1. It is turned on because the Schottky diode 22 has a lower forward voltage than the bulk diode. It also eliminates the effect of the intrinsic body diode (not shown) of the vertical conduction MOSFET 21. The MOSFETs 20 and 21 of Fig. 2 can be 30v and 35 milliohm die obtained from International Rectifier Corporation (IRFC). The grains 20 and 21 may have dimensions of 0_102x0.070x0.008 inches and 0.071 × 0.070 × 0 · 008 respectively. The paper size of the paper is applicable to China National Standard (CNS) A4 (210 X 297 mm) 7 --- --------------- (Please read the notes on the back before filling this page) Order- --Line ·

521416 V. Description of the invention (5) inch IRFC 73XXB MOSFET; and Schottky diode 22 may have a size of .021 > < 0.0.05 > < 0.0.10 inch 53〗% again and again. The package body 23 may be in the form of a known type so-8 package shown in FIGS. 3 and 1. Therefore, Figure 3 shows a so-8 surface mount package with eight side-by-side pins 1 to 8 (Figure 4) extending from a plastic insulating package 30. As seen in FIG. 4, the MOSFET die 20, the MOSFET die 21, and the Schottky monopole 22 are mounted in a common package 30 (as will be described later), and Connect to each other to obtain external connections as in Figure 2 or other circuit configurations. However, it is better to make the internal connections as much as possible to reduce the circuit inductance. Therefore, as will be shown in Figure 6, many electrical connections are made in the package 30. In Fig. 4, the drain of the MOSFET 21 and the cathode of the Schottky diode 22 are connected to each other and to pins 7 to 8 of a common lead frame section as will be described later. The source and gate of the MOSFET 21 are connected to the isolation pins 1 and 2 by bonding wires, respectively, and the anode of the Schottky diode 22 is connected to the source of the MOSFET 21 by bonding wires. FIG. 5 shows the lead frame 40 with the MOSFET 20, the MOSFET 21, and the Schottky diode 22 in more detail. The lead frame 40 includes a first die pad 41A integrally extending from the pins 7 and 8 therefrom. The first die pad 41A may be larger than the main pad body of a conventional lead frame, so that both the MOSFET 21 and the Schottky diode 22 can be mounted on it. The lead frame 40 also includes a second die pad 41B for accommodating the MOSFET 20 and the pins 5 and 6 extending integrally therefrom. According to the new aspect of the invention, the side walls of the plastic insulation package 30 are thinner than those of traditional packages, so that the paper's dimensions are compatible with Chinese National Standard (CNS) A4 (210 X 297) without significantly reducing resistance to moisture. Mm) · ^ ----- install · 1 (please read the notes on the back to write this page) Order · • Line-Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs and Consumer Cooperatives 521416 A7 B7 • Employees of the Ministry of Economic Affairs and Intellectual Property Printed by the cooperative Fifth, description of the invention (6 nanometers larger die pads 41A, 41B. The lead frame also contains—pins 1 to 4 and individual bonded pad extensions in the die-cast package 30. These were originally integrated with the leadframe body 40 (during the mold rotation), but were not as severe as the isolation of pins 1 to 4 from each other and from the die pads 41 and 41B. Typically, pins 1 to 4 * Coplanar with each other and coplanar with the die pads 4 1A, 4 1B. The lead frame 40 is a conductive frame and can be used for traditional lead frame welding. The bottom cathode surface of the Schottky diode 22 and the mSFET 21 The bottom drain surface is adhered to the composition via a conductive resin crystal Connected to the die pad 41a, and therefore to pins 7 and 8. Alternatively, the cathode surface of the Schottky diode 22 and the > and pole surfaces of the MOSFET 21 may be soldered to the die pad 4ia, or A conductive glass containing silver particles can be used to connect to the die pad 41A. The anode electrode of the Schottky diode 22 is bonded to the source electrode of the MOSFET 21 by gold bonding wires 50 and 51. The source of the MOSFET 21 The gate and gate electrodes are connected to the internal bonding extensions of pins 1 and 2 by gold wirings 52 and 53, respectively. Alternatively, a quality bonding wiring can be used. The drain of MOSFET 20 is connected to it via a conductive resin adhesion composition Die pad 41B, and therefore also connected to pins 5 and 6 of lead frame 40. Alternatively, the drain surface of MOSFET 20 may be soldered to die pad 41B, or may be connected using conductive glass containing silver particles To the die pad 41B. The source electrode of MOSFET 20 is connected to the internal bonding extension of pin 3 by gold bonding wiring 54. The gate electrode of MOSFET 20 is connected to the internal bonding extension of pin 4 by gold bonding wiring 55. . Alternatively, you can use the paper size With China National Standard (CNS) A4 specification (210 X 297 mm) 9 1 ------------ ^ --------- ^ --------- (Please read the notes on the back before filling out this page) 521416 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs

_ ^ .— (Please read the note on the back first to write this page) · Wire · A7 ------- ____ _ __ 5. Description of the invention (7) Combine wiring in Lu Zhi. The internal joint extensions of pins 1 to 8 are typically plated with silver or gold. Bonding The wiring is generally bonded to the surface of the die, or bonded to the internal bonding extension using thermal sound ball bonding as known in the art, although other procedures can be used without departing from the scope of the invention. Thereafter, the package body 30, which may be a die-casting composition such as NITTO MP7400, is formed by a conventional die-casting operation; however, other types of materials such as ceramics, implicit materials, or injection-molded metals may be used. Fig. 6 shows a second embodiment of the invention, in which the same reference numerals of Fig. 5 identify the same elements. The components in FIG. 6 have been reconfigured from the positions in FIG. 5 so that the MOSFET 20 is fixed to the pad 41 and the MOSFET 21 and Schottky diode 22 are fixed to the pad 41B. The gates of MOSFETs 20 and 21 are coupled to pins 2 and 4, respectively, and the source electrode of MOSFET 21 is connected to pins 5 and 2. According to a further invention of FIG. 6, the source electrode of the MOSFET 20 is bonded to the pad 41β by the bonding wiring 100 in the package 30. Therefore, the source of the MOSFET 20 is traditionally connected internally to the drain and cathode electrodes of the MOSFET and Schottky diode 22, respectively. However, these connections in Figure 5 are made externally. More preferably, a Calvin contact is bonded to the pin 1 by a bonding wiring 101. Please note that other packaging types can be used, but co-packaging reduces the equivalent board space in a surface mount package (preferably SO-8). The resulting device can be soldered down to a printed circuit board using conventional mass production soldering techniques. Although the present invention has been described in relation to specific embodiments, the Chinese National Standard (CNS) A4 specification (210 X 297 mm) applies to those who are familiar with this paper size. 10

521416 V. Description of the invention (8 The skilled person's many other changes and amendments and other dependencies become obvious. Therefore, preferably, the present invention is not limited by this, ^ Limits on the scope of patent applications. K /, and the reference numbers of components are 0, 20, 21 ... N-channel MOSFETs 11 ... control circuits 12, 22 ... Schottky diodes 13 ... inductors 14 ... capacitors 23 ··· Block 3 〇 ... Package 4 ··· Lead frame 41A ·· .. First die block 41B ··· Brother—die block 50-55 ·· Gold wiring 100, 101 ... Combined wiring. I I --------- I «11ΙΙΙΙΙ— (Please read the precautions on the back before filling out this page} The Ministry of Intellectual Property Bureau's consumer cooperation printed on this paper is applicable to China National Standard (CNS) A4 (210 X 297 mm)

Claims (1)

6. Application for Patent Scope No. 90112406 Application for Amendment of Patent Scope 911220 1. A semiconductor device comprising: .. at least the first, second, and third semiconductor dies, each having an opposite surface including an individual electrode; A conductive lead frame includes first and second discrete grain bulk regions, first and second semiconductor grains are provided on the first grain pad, and the third semiconductor grain is provided. On the second die pad; the first plurality of pins are integrated with and extended from an edge of the first die pad; the second plurality of pins are connected to the second die pad One of the edges is integrated and extends from it; the third plurality of pins are separated from each other and separated from the first and second die pads; Βθ is a first plurality of bonding wires, one of the first semiconductor die Surface-connected to at least one of the third plurality of pins; a second plurality of bonding wires connecting one surface of the third semiconductor die to at least one of the third plurality of pins; and a package body To encapsulate the lead frame A semiconductor die, and a wiring junction σ 'of _ such, second, and third plurality of pins extending beyond the perimeter of the closure to the body of the package for external connection. 2. The device according to item 1 of the scope of patent application, in which the first and third die-based MOSFET die each have a source electrode, a drain electrode, and a gate electrode; 521416 ABC D • VI. Patent Application Range 々 = The surfaces of the first- and second-M0SFET grains in contact with the individual first and first aa pad regions are the drain electrodes; and the individual of the first and third M0SFET wires Idle electrode: The source electrode of the first M0 die is connected to one of the two or more pins. Device 3. The oldest device according to the scope of the patent application, wherein the first semiconductor die system is a Schottky diode die, and the opposite surface package 3 of the first semiconductor die is coupled to the first die pad. The cathode electrode of the Schottky diode in the region, so that the cathode electrode of the Schottky diode is electrically connected to the drain electrode of the first MOSFET die and is electrically connected to the The first plurality of pins, an opposite surface of the Schottky diode grains includes an anode electrode. 4. The device according to item 3 of the scope of patent application, wherein the anode electrode of the Schottky diode chip is coupled to the source electrode of the first MOSFE die by a bonding wire. Line 5. The device according to item 1, 2, 3 or 4 of the scope of patent application, the package body and the first, second, and third pins are in accordance with a so_8 packaging standard. 6. The device according to item 1, 2, 3 or 4 of the Shen Yan patent scope, wherein the third plurality of pins are arranged along the opposite common edge of one of the packages. 7. The device according to claim 1, 2, 3, or 4, wherein the third plurality of pins have an enlarged bonding pad area that is coplanar with the rest and relative to one of the individual die pad areas. 13 6. Scope of Patent Application 8. A semiconductor device including: first and second MQSFET dies, each having opposite surfaces including individual drain, source, and gate electrodes; a Schottky diode Grains having opposite surfaces containing individual anode and cathode electrodes; a conductive leadframe including first and second discrete die pad regions, the first MOSFET die and the Schottky diode die Is disposed on the first die pad so that the drain and cathode electrodes thereof are electrically coupled to the first die pad region, and the second MOSFET chip is placed on the second die The die pad is electrically coupled to its drain electrode; the first plurality of pins are integrated with and extend from one edge of the second die pad; the second plurality of pins are connected to the One edge of the second die pad is integrated and extends therefrom; a third plurality of pins are separated from each other and separated from the first and second die pads; a first plurality of bonding wires connect the first The source electrode of a MoSFET die is connected to the third At least one of the two pins; a second plurality of bonding wires connecting the source of the second MOSFET die to the other of the third plurality of pins, or to the first die pad ; And a package for packaging the lead frame, MoSFE1 ^ 0 Schottky diode die, and bonding wiring, the first, second and third multiple i, patent application pin extensions Beyond the periphery of the package for external connection. 9. The device according to item 8 of the scope of the patent application, wherein the Schottky diode is referred to as the n% electrode of the grain and is lightly closed to the source electrode of the first MOSFET die through bonding wiring. 10. The device according to item 8 or 9 of the scope of patent application, wherein the package body and the first, second, and third pins are in accordance with a so_8 packaging standard. 11. The device according to item 8 or 9 of the scope of patent application, wherein the first and second pins are arranged along a common edge of the package. 12. The device according to item 8 or 9 of the scope of patent application, wherein the third plurality of pins are arranged along the opposite common edge of one of the packages. 13. The device according to item 8 or 9 of the scope of the patent application, wherein each of the third plurality of pins has an enlarged bonding pad area coplanar with respect to one of the individual die pad areas. 14. The device according to item 1, 2, 3, *, 8, or 9 of the scope of patent application, which further includes a device that connects the source of the third MOSFET die to one of the third pins. One Calvin contact bonding wiring.