JP5696676B2 - 電子部品実装方法 - Google Patents
電子部品実装方法 Download PDFInfo
- Publication number
- JP5696676B2 JP5696676B2 JP2012044200A JP2012044200A JP5696676B2 JP 5696676 B2 JP5696676 B2 JP 5696676B2 JP 2012044200 A JP2012044200 A JP 2012044200A JP 2012044200 A JP2012044200 A JP 2012044200A JP 5696676 B2 JP5696676 B2 JP 5696676B2
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- lead frame
- mounting method
- wire
- component mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
Description
Claims (4)
- 上下一対のリードフレーム間に電子部品を実装するための電子部品実装方法であって、
前記上下一対のリードフレームのうちの一方のリードフレームの所定の箇所に前記電子部品を配置する工程と、
前記所定の箇所に配置された前記電子部品をワイヤによって前記一方のリードフレームに固定する工程と、を備え、
前記一方のリードフレームの前記所定の箇所は、前記一方のリードフレームの先端部に設けられた凹部であり、
前記電子部品を前記ワイヤによって前記一方のリードフレームに固定する工程においては、前記凹部を規定する凸部に前記ワイヤを挿通することにより、前記ワイヤからの応力によって前記電子部品を前記一方のリードフレームに固定する、
ことを特徴とする電子部品実装方法。 - 前記電子部品を前記ワイヤによって前記一方のリードフレームに固定した状態において、前記一方のリードフレームに予め配置された予備はんだを溶融することにより、前記電子部品を前記一方のリードフレームに固着する工程をさらに備える、ことを特徴とする請求項1に記載の電子部品実装方法。
- 前記電子部品を前記一方のリードフレームに固着する工程においては、前記予備はんだを溶融することにより、前記ワイヤを前記一方のリードフレームに固着する、ことを特徴とする請求項2に記載の電子部品実装方法。
- 前記上下一対のリードフレームは、インバータのスイッチング素子に接続されており、
前記電子部品は、前記スイッチング素子に接続されるスナバコンデンサである、ことを特徴とする請求項1〜3のいずれか一項に記載の電子部品実装方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012044200A JP5696676B2 (ja) | 2012-02-29 | 2012-02-29 | 電子部品実装方法 |
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---|---|---|---|
JP2012044200A JP5696676B2 (ja) | 2012-02-29 | 2012-02-29 | 電子部品実装方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2013182936A JP2013182936A (ja) | 2013-09-12 |
JP5696676B2 true JP5696676B2 (ja) | 2015-04-08 |
Family
ID=49273409
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012044200A Expired - Fee Related JP5696676B2 (ja) | 2012-02-29 | 2012-02-29 | 電子部品実装方法 |
Country Status (1)
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JP (1) | JP5696676B2 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015089245A (ja) * | 2013-10-31 | 2015-05-07 | Ntn株式会社 | 車両駆動モータ用インバータ装置 |
WO2016157616A1 (ja) * | 2015-03-27 | 2016-10-06 | 三菱電機株式会社 | 半導体装置及びその製造方法 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090273072A1 (en) * | 2005-03-31 | 2009-11-05 | Pioneer Corporation | Semiconductor device and method for manufacturing the same |
JP4803068B2 (ja) * | 2007-02-22 | 2011-10-26 | トヨタ自動車株式会社 | 半導体モジュール |
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2012
- 2012-02-29 JP JP2012044200A patent/JP5696676B2/ja not_active Expired - Fee Related
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JP2013182936A (ja) | 2013-09-12 |
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