JP6324098B2 - 表示装置及びその製造方法 - Google Patents
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- 238000004519 manufacturing process Methods 0.000 title claims description 25
- 239000010408 film Substances 0.000 claims description 332
- 239000010409 thin film Substances 0.000 claims description 61
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- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 claims description 7
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 8
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- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
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- 239000012780 transparent material Substances 0.000 description 1
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/7866—Non-monocrystalline silicon transistors
- H01L29/78672—Polycrystalline or microcrystalline silicon transistor
- H01L29/78675—Polycrystalline or microcrystalline silicon transistor with normal-type structure, e.g. with top gate
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- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
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- H10K59/122—Pixel-defining structures or layers, e.g. banks
Description
以下、図4乃至図6を参照し、本発明の第1の実施形態に係る表示装置10の概略構成について説明する。図4は、本発明の第1の実施形態に係る表示装置10の概略構成を示す断面図である。図5は、本発明の第1の実施形態に係る表示装置10の端子部の概略構成を示す図であり、(a)は端子部の平面図であり、(b)は端子部の断面図である。図6は、本発明の第1の実施形態に係る表示装置10の配線部の概略構成を示す断面図である。
以下、図7乃至図9を参照し、本発明の第2の実施形態に係る表示装置の概略構成について説明する。図7は、本発明の第2の実施形態に係る表示装置の概略構成を示す断面図である。図8は、本発明の第2の実施形態に係る表示装置の端子部の概略構成を示す図であり、(a)は端子部の平面図であり、(b)は端子部の断面図である。図9は、本発明の第2の実施形態に係る表示装置の配線部の概略構成を示す断面図である。
Claims (10)
- 基板上に、薄膜トランジスタを備える画素を複数配置した表示部と、
前記薄膜トランジスタの動作を制御するための信号が入力される複数の端子が配列された端子部と、を有する表示装置の製造方法であって、
前記基板上に第1絶縁膜を形成し、
前記第1絶縁膜上に前記薄膜トランジスタを形成し、
前記薄膜トランジスタの形成後に前記表示部と前記端子部とに第2絶縁膜を形成し、
前記第2絶縁膜に、前記薄膜トランジスタの少なくとも一部を露出させるコンタクトホールを形成するとともに、前記端子部において複数の開口部を形成し、
前記第2絶縁膜上に、前記薄膜トランジスタに前記コンタクトホールを介して接続される複数の信号線と、前記複数の信号線の形成と同時に、前記開口部を間に挟むように複数の端子配線を形成し、
前記複数の信号線及び前記複数の端子配線上に有機絶縁膜からなる第3絶縁膜を形成することを含むことを特徴とする表示装置の製造方法。 - 前記端子部において、前記第3絶縁膜を一部除去して前記複数の端子配線を露出させ、
前記複数の端子配線の前記露出された部分を覆う導電膜を形成することをさらに含むことを特徴とする請求項1に記載の表示装置の製造方法。 - 基板上に、薄膜トランジスタを備える画素を複数配置した表示部と、
前記薄膜トランジスタの動作を制御するための信号が入力される複数の端子が配列された端子部と、を有する表示装置の製造方法であって、
前記基板上に第1絶縁膜を形成し、
前記第1絶縁膜上に前記薄膜トランジスタを形成し、
前記薄膜トランジスタの形成後に前記表示部と前記端子部とに第2絶縁膜を形成し、
前記第2絶縁膜に、前記薄膜トランジスタの少なくとも一部を露出させるコンタクトホールを形成するとともに、前記端子部において複数の開口部を形成し、
前記第2絶縁膜上に、前記薄膜トランジスタに前記コンタクトホールを介して接続される複数の信号線と、前記複数の信号線の形成と同時に、前記開口部を間に挟むように複数
の端子配線を形成し、
前記複数の信号線上に有機絶縁膜からなる第3絶縁膜を形成し、
前記第3絶縁膜及び前記複数の端子配線上に、無機絶縁膜からなる第4絶縁膜を形成し、
前記端子部において、前記第4絶縁膜を一部除去して前記複数の端子配線を露出させ、
前記複数の端子配線の前記露出された部分を覆う導電膜を形成し、
前記導電膜上に、第5絶縁膜を形成することを含み、
前記第5絶縁膜を一部除去して前記導電膜を露出させることをさらに含むこと特徴とする表示装置の製造方法。 - 前記導電膜を、透光性を有する導電膜を用いて形成することを特徴とする請求項2または3に記載の表示装置の製造方法。
- 前記第3絶縁膜を、アクリルまたはポリイミドを用いて形成することを特徴とする請求項1乃至4のいずれか一項に記載の表示装置の製造方法。
- 基板上に、薄膜トランジスタを備える画素を複数配置した表示部と、
前記薄膜トランジスタの動作を制御するための信号が入力される複数の端子が配列された端子部と、を有する表示装置であって、
前記基板上に配置された第1絶縁膜と、
前記第1絶縁膜上に配置された前記薄膜トランジスタと、
前記表示部及び前記端子部に配置され、前記薄膜トランジスタの少なくとも一部を露出させるコンタクトホールと、前記複数の端子の間に配置される開口部と、を備える第2絶縁膜と、
前記第2絶縁膜上に配置され、前記コンタクトホールを介して前記薄膜トランジスタに接続される複数の信号線と、前記端子部に配置される複数の端子配線と、
前記複数の信号線上に配置される有機絶縁膜からなる第3絶縁膜と、
前記第3絶縁膜及び前記複数の端子配線上に配置される無機絶縁膜からなり、前記複数の端子配線の一部を露出させる複数の貫通孔を備える第4絶縁膜と、
前記第4絶縁膜上に配置され、前記複数の貫通孔を介してそれぞれ前記複数の端子配線に接続される前記複数の端子と、
前記複数の端子上に、前記複数の端子の一部を露出させて配置される第5絶縁膜と、を備えること特徴とする表示装置。 - 前記複数の端子は、前記第3絶縁膜上に配置され、前記第3絶縁膜に形成された複数の貫通孔を介してそれぞれ前記複数の端子配線と接続されることを特徴とする請求項6に記載の表示装置。
- 前記複数の端子は、透光性を有する導電膜を用いて形成されることを特徴とする請求項
6又は請求項7に記載の表示装置。 - 前記第3絶縁膜は、アクリルまたはポリイミドを用いて形成されることを特徴とする請求項6乃至8のいずれか一項に記載の表示装置。
- 前記第4絶縁膜及び前記第5絶縁膜は、前記開口部に重畳するように形成されることを特徴とする請求項6乃至9のいずれか一項に記載の表示装置。
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JP6454250B2 (ja) * | 2015-09-18 | 2019-01-16 | 株式会社ジャパンディスプレイ | 半導体装置及びその製造方法 |
JP6486291B2 (ja) * | 2016-02-24 | 2019-03-20 | 株式会社ジャパンディスプレイ | 表示装置の製造方法、及び、表示装置 |
JP2017152231A (ja) * | 2016-02-25 | 2017-08-31 | 株式会社ジャパンディスプレイ | 表示装置、表示装置の製造方法 |
JP6756508B2 (ja) | 2016-04-04 | 2020-09-16 | 株式会社ジャパンディスプレイ | 表示装置 |
JP2018005003A (ja) | 2016-07-04 | 2018-01-11 | 株式会社ジャパンディスプレイ | 表示装置及び表示装置の製造方法 |
JP2018005004A (ja) | 2016-07-04 | 2018-01-11 | 株式会社ジャパンディスプレイ | 表示装置 |
KR101951939B1 (ko) | 2016-08-26 | 2019-02-25 | 엘지디스플레이 주식회사 | 표시장치 |
JP6935244B2 (ja) * | 2017-06-27 | 2021-09-15 | 株式会社ジャパンディスプレイ | 表示装置、および表示装置の製造方法 |
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- 2015-01-22 CN CN201510031570.1A patent/CN104835420B/zh active Active
- 2015-01-28 US US14/608,036 patent/US9263479B2/en active Active
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TWI597837B (zh) | 2017-09-01 |
KR101701021B1 (ko) | 2017-01-31 |
KR20150093101A (ko) | 2015-08-17 |
US9508752B2 (en) | 2016-11-29 |
US20150221683A1 (en) | 2015-08-06 |
CN104835420A (zh) | 2015-08-12 |
TW201532265A (zh) | 2015-08-16 |
US9263479B2 (en) | 2016-02-16 |
US20160181282A1 (en) | 2016-06-23 |
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JP2015148728A (ja) | 2015-08-20 |
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