JP6182309B2 - 配線基板、半導体装置及び配線基板の製造方法 - Google Patents
配線基板、半導体装置及び配線基板の製造方法 Download PDFInfo
- Publication number
- JP6182309B2 JP6182309B2 JP2012259682A JP2012259682A JP6182309B2 JP 6182309 B2 JP6182309 B2 JP 6182309B2 JP 2012259682 A JP2012259682 A JP 2012259682A JP 2012259682 A JP2012259682 A JP 2012259682A JP 6182309 B2 JP6182309 B2 JP 6182309B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- solder
- metal
- post
- solder layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
- H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/63—Vias, e.g. via plugs
- H10W70/635—Through-vias
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0338—Layered conductor, e.g. layered metal substrate, layered finish layer or layered thin film adhesion layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3465—Application of solder
- H05K3/3473—Plating of solder
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/69—Insulating materials thereof
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012259682A JP6182309B2 (ja) | 2012-11-28 | 2012-11-28 | 配線基板、半導体装置及び配線基板の製造方法 |
| US14/087,350 US9380712B2 (en) | 2012-11-28 | 2013-11-22 | Wiring substrate and semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012259682A JP6182309B2 (ja) | 2012-11-28 | 2012-11-28 | 配線基板、半導体装置及び配線基板の製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2014107427A JP2014107427A (ja) | 2014-06-09 |
| JP2014107427A5 JP2014107427A5 (https=) | 2015-12-17 |
| JP6182309B2 true JP6182309B2 (ja) | 2017-08-16 |
Family
ID=50773119
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012259682A Expired - Fee Related JP6182309B2 (ja) | 2012-11-28 | 2012-11-28 | 配線基板、半導体装置及び配線基板の製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US9380712B2 (https=) |
| JP (1) | JP6182309B2 (https=) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2015231003A (ja) * | 2014-06-06 | 2015-12-21 | イビデン株式会社 | 回路基板および回路基板の製造方法 |
| JP2016076534A (ja) * | 2014-10-03 | 2016-05-12 | イビデン株式会社 | 金属ポスト付きプリント配線板およびその製造方法 |
| JP2016076533A (ja) * | 2014-10-03 | 2016-05-12 | イビデン株式会社 | バンプ付きプリント配線板およびその製造方法 |
| JP6619294B2 (ja) * | 2016-05-24 | 2019-12-11 | 新光電気工業株式会社 | 配線基板及びその製造方法と電子部品装置 |
| FR3094172B1 (fr) * | 2019-03-19 | 2022-04-22 | St Microelectronics Grenoble 2 | Dispositif électronique comprenant un composant électronique monté sur un substrat de support et procédé de montage |
| JP7313894B2 (ja) * | 2019-04-26 | 2023-07-25 | 新光電気工業株式会社 | 配線基板及び配線基板の製造方法 |
| KR102946068B1 (ko) * | 2020-12-11 | 2026-04-01 | 삼성전기주식회사 | 인쇄회로기판 및 전자부품 패키지 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2974436B2 (ja) * | 1991-02-26 | 1999-11-10 | シチズン時計株式会社 | ハンダバンプの形成方法 |
| JP2751912B2 (ja) * | 1996-03-28 | 1998-05-18 | 日本電気株式会社 | 半導体装置およびその製造方法 |
| JP3050807B2 (ja) * | 1996-06-19 | 2000-06-12 | イビデン株式会社 | 多層プリント配線板 |
| JP3071723B2 (ja) * | 1997-05-23 | 2000-07-31 | 京セラ株式会社 | 多層配線基板の製造方法 |
| JP2000294586A (ja) * | 1999-04-02 | 2000-10-20 | Nec Corp | 半導体装置及び半導体装置の製造方法 |
| JP2004200412A (ja) | 2002-12-18 | 2004-07-15 | Kyocera Corp | 半田バンプ付き配線基板およびその製造方法 |
| JP2005222966A (ja) * | 2004-02-03 | 2005-08-18 | Citizen Watch Co Ltd | 半導体装置とその製造方法 |
| JP2005294482A (ja) * | 2004-03-31 | 2005-10-20 | Fujikura Ltd | 電子部品及び電子装置 |
| JP4646296B2 (ja) * | 2004-07-30 | 2011-03-09 | コーア株式会社 | 電子部品 |
| JP2006295109A (ja) * | 2005-03-14 | 2006-10-26 | Citizen Watch Co Ltd | 半導体装置とその製造方法 |
| JP5075611B2 (ja) * | 2007-12-21 | 2012-11-21 | ローム株式会社 | 半導体装置 |
| JP6081044B2 (ja) * | 2010-09-16 | 2017-02-15 | 富士通株式会社 | パッケージ基板ユニットの製造方法 |
| KR101167805B1 (ko) * | 2011-04-25 | 2012-07-25 | 삼성전기주식회사 | 패키지 기판 및 이의 제조방법 |
-
2012
- 2012-11-28 JP JP2012259682A patent/JP6182309B2/ja not_active Expired - Fee Related
-
2013
- 2013-11-22 US US14/087,350 patent/US9380712B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US20140146503A1 (en) | 2014-05-29 |
| JP2014107427A (ja) | 2014-06-09 |
| US9380712B2 (en) | 2016-06-28 |
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