JP7198154B2 - 配線基板、及び配線基板の製造方法 - Google Patents
配線基板、及び配線基板の製造方法 Download PDFInfo
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- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68359—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
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- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
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- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
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- H05K1/18—Printed circuits structurally associated with non-printed electric components
Description
[配線基板の構成]
図1は、実施例1に係る配線基板1の構成の一例を示す図である。図1においては、配線基板1の断面を模式的に示している。
図2は、実施例1に係る配線基板1を用いて作製された半導体装置100の構成の一例を示す図である。図2においては、半導体装置100の断面を模式的に示している。
次に、実施例1に係る配線基板1の製造方法について、説明する。
次に、実施例1に係る半導体装置100の製造方法について、具体的に例を挙げながら説明する。
実施例2は、実施例1では、凸状に湾曲した曲面を有するパッド41を他の配線基板と接続するための外部接続用の端子として用いる。これに対して、実施例2では、凸状に湾曲した曲面を有するパッド41を半導体チップ等の電子部品と電気的に接続するための電子部品搭載用の端子として用いる。また、実施例2では、絶縁層25の上面25aに絶縁層50を積層している。
図13は、実施例2に係る配線基板1Aの構成の一例を示す図である。図13においては、配線基板1Aの断面を模式的に示している。
図14は、実施例2に係る配線基板1Aを用いて作製された半導体装置100Aの構成の一例を示す図である。図14においては、半導体装置100Aの断面を模式的に示している。
次に、実施例2に係る配線基板1Aの製造方法について説明する。
次に、実施例2に係る半導体装置100Aの製造方法について説明する。
10 絶縁層(第1絶縁層)
10a 上面(第1面)
10b 下面(第2面)
10x 貫通孔(第1貫通孔)
21 絶縁層(第2絶縁層)
22 配線層(第1配線層)
22a ビア配線(第1ビア配線)
22b 配線パターン(第1配線パターン)
23、25 絶縁層
24、26 配線層
30 ソルダーレジスト層(保護層)
30x 開口部
31、71 バンプ
41 パッド
41a 上面(接続面)
41b 下面(第1面)
50 絶縁層(第3絶縁層)
50x 貫通孔
51 配線層(第2配線層)
70 表面処理層
500 支持体
510 シード層
Claims (8)
- 絶縁性樹脂からなる第1絶縁層と、
前記第1絶縁層を厚さ方向に貫通する第1貫通孔と、
前記第1貫通孔内に設けられたパッドと、
前記第1絶縁層の第1面に積層され、絶縁性樹脂からなる第2絶縁層と、
前記第2絶縁層に設けられ、前記パッドと接続される第1配線層と、を備え、
前記パッドの前記第1配線層と接続される接続面は、前記第1絶縁層の前記第1面に向かって凸状に湾曲した曲面を有し、
前記第1貫通孔の内壁面は、前記第1貫通孔の開口部内に向かって突出する湾曲した曲面を有し、
前記パッドの接続面の外縁部は、前記第1絶縁層の第1面よりも低い位置において前記第1貫通孔の内壁面と接していることを特徴とする配線基板。 - 前記第2絶縁層は、前記第1貫通孔の開口部内に入り込むように設けられていることを特徴とする請求項1に記載の配線基板。
- 前記第1絶縁層の厚さは、前記第2絶縁層の厚さよりも厚いことを特徴とする請求項1又は2に記載の配線基板。
- 前記パッドの前記接続面とは反対側の面は、前記第1絶縁層の前記第1面とは反対側の第2面の位置よりも、前記第1絶縁層の前記第1面側に位置することを特徴とする請求項1~3のいずれか一つに記載の配線基板。
- 支持体上にシード層及び絶縁性樹脂からなる第1絶縁層を順に形成する工程と、
前記第1絶縁層をパターニングして、内壁面が開口部内に向かって突出する湾曲した曲面の貫通孔を形成する工程と、
前記貫通孔内に、凸状に湾曲した曲面を有するパッドを形成する工程と、
前記第1絶縁層の第1面に、前記パッドを覆うように絶縁性樹脂からなる第2絶縁層を形成する工程と、
前記第2絶縁層に、前記第2絶縁層を厚さ方向に貫通する第1ビア配線と、前記第2絶縁層の第1面に第1配線パターンとからなる第1配線層を形成する工程と、
を有し、
前記パッドの凸状に湾曲した曲面は、前記第1配線層の第1ビア配線と接続され、
前記パッドの前記第1ビア配線と接続される接続面の外縁部は、前記第1絶縁層の第1面よりも低い位置において前記貫通孔の内壁面と接していることを特徴とする配線基板の製造方法。 - 前記第2絶縁層に、複数の絶縁層と複数の配線層を交互に積層する工程と、
前記シード層から前記支持体を剥離する工程と、
前記シード層を除去して、前記第1絶縁層の前記第1面とは反対側の第2面と、前記パッドの前記第1配線層と接続される接続面とは反対側の第1面とを露出させる工程と、
前記第1絶縁層の前記第2面に、前記パッドの第1面の一部を露出させる開口部が設けられた保護層を形成する工程と、
前記保護層の開口部から露出する前記パッドの第1面にバンプを形成する工程と、
を有することを特徴とする請求項5に記載の配線基板の製造方法。 - 前記第2絶縁層に、複数の絶縁層と複数の配線層を交互に積層する工程と、
前記シード層から前記支持体を剥離する工程と、
前記シード層を除去して、前記第1絶縁層の前記第1面とは反対側の第2面と、前記パッドの前記第1配線層と接続される接続面とは反対側の第1面を露出させる工程と、
前記パッドの第1面をエッチングして、前記第1絶縁層の第2面よりも前記パッドの第1面を前記第1絶縁層の前記第1面側に後退させる工程と、
を有することを特徴とする請求項5に記載の配線基板の製造方法。 - 前記複数の配線層のうち最上層に位置する配線層の一部を露出させる貫通孔が形成された第3絶縁層を形成する工程と、
前記第3絶縁層上に、前記第3絶縁層の貫通孔を介して、前記最上層に位置する配線層に接続する第2配線層を形成する工程と、
前記第3絶縁層上に、前記第2配線層の一部を露出させる開口部が設けられた保護層を形成する工程と、
を有することを特徴とする請求項7に記載の配線基板の製造方法。
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US16/875,072 US11011457B2 (en) | 2019-05-22 | 2020-05-15 | Wiring substrate |
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JP2008263125A (ja) | 2007-04-13 | 2008-10-30 | Shinko Electric Ind Co Ltd | 配線基板の製造方法及び半導体装置の製造方法及び配線基板 |
JP2018195600A (ja) | 2017-05-12 | 2018-12-06 | 新光電気工業株式会社 | 配線基板、配線基板の製造方法 |
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JP5361314B2 (ja) * | 2008-09-29 | 2013-12-04 | 京セラ株式会社 | 多層配線基板及びプローブカード |
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JP2008263125A (ja) | 2007-04-13 | 2008-10-30 | Shinko Electric Ind Co Ltd | 配線基板の製造方法及び半導体装置の製造方法及び配線基板 |
JP2018195600A (ja) | 2017-05-12 | 2018-12-06 | 新光電気工業株式会社 | 配線基板、配線基板の製造方法 |
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