JP5961557B2 - GaNデバイスのための導電率ベースの選択的エッチング及びその用途 - Google Patents
GaNデバイスのための導電率ベースの選択的エッチング及びその用途 Download PDFInfo
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- JP5961557B2 JP5961557B2 JP2012551282A JP2012551282A JP5961557B2 JP 5961557 B2 JP5961557 B2 JP 5961557B2 JP 2012551282 A JP2012551282 A JP 2012551282A JP 2012551282 A JP2012551282 A JP 2012551282A JP 5961557 B2 JP5961557 B2 JP 5961557B2
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Description
(連邦政府後援の研究及び開発に関する記述)
本発明の開発中に行われた研究の一部には、米国エネルギー省により与えられた、助成金DE−FC26−07NT43227、DE−FG0207ER46387、及びDE−SCOOO1134の下での米国政府資金が用いられた。米国政府は本発明における一定の権利を有する。
NP基板を使用する方法に向けられる更に別の実施形態は、(1)電気化学エッチングによってサファイア(又は、III族窒化物、SiC、Si、ZnO、LiNbO3、LiAlO2等)基板上に、極性、非極性及び半極性のNP III族窒化物構造体を作製する技術、(2)NP構造体上に高品質の極性、非極性及び半極性のIII族窒化物材料を成長させる技術、(3)再成長されたIII族窒化物材料を用いて、極性、非極性及び半極性のIII族窒化物光電子デバイス(LED、レーザ等)及び高電子移動度トランジスタなどの電子デバイスを製造する技術、及び(4)HVPEにより、NP III族窒化物構造体上に再成長されたIII族窒化物材料を用いて、極性、非極性及び半極性のIII族窒化物バルク基板を生成する技術を含む。
図8は、埋込みNP GaN層(図8cの828)の存在のために、抽出特性が増強されたInGaN/GaN活性構造体の製造についての、以前に開示された実施形態の適用を示す。そのような構造体は、前項で述べられ、図7に示されるように製造されたNP GaNテンプレート上にInGaN/GaN活性構造体を成長させることによって形成される。図8cは埋込みNP GaN層828を有するInGaN/GaN活性領域を示し、一方、図8bはより伝統的なInGaN/GaN活性領域構造体を示す。
図10は、自立型のGaN膜及び層を生成するための、本発明の更に別の実施形態を示す。1つの実施形態は、均一にドープされたGaN層1018に基づいており、低電圧条件下(図10aの特徴部1004)でECエッチングを進行させ、低密度(109cm-2未満)及び小さい直径(約30nm)を有するナノ孔1020及び1024の生成及び垂直方向下方への伝播をもたらす。ひとたび、最終的な膜の厚さに対応する所望の厚さに達すると、エッチング電圧は、(図10aの1004から)状態図上のエッチング条件の横方向の移動(図10aの地点1008まで)に対応して増大される。この条件は、GaNの迅速な分岐、及び低多孔率層1024の下の高多孔率層1026への横方向エッチングをもたらす。連続的な結晶層1030の形成及び剥離が、図10b−図10eに概略的に示される。
図13に示す更に別の実施形態は、III族窒化物材料及びNP GaNを用いたデバイスについての基板の再利用の構想を示す。上で採用した新規な電気化学ブロセスを用いて、所望の多孔率プロファイルのNP GaN層1304を形成することが可能である。アニール及び再成長のために、ナノ多孔質構造体1304をエピタキシャル・チャンバ内に再び装填することができる。NP領域は大きい気泡又はボイド1310に変形される。大きい気泡が融合してボイド1314を形成する熱アニール中、GaN層又はデバイス1312のさらなる再成長が、同時に、変形1310を受ける埋込み高多孔率領域を生成する。そのようなボイドは、面内破壊、層分離、及びエピタキシャル・ウェハの移動を容易にする。
本発明の更に別の実施形態は、NP GaNベースのナノ結晶の生成に関する。前の実施形態において開示された電気化学プロセスを用いて、機械的強度が大きく弱められた繊維状単結晶GaN材料を生成することができる。機械的強度の減少は、アスペクト比、及び繊維状材料の大きく増大した表面積の変化に起因する。NP GaNは、機械的破壊、及び超音波処理(又は研削)プロセスによる、蛍光標識法、光起電装置、ディスプレイ照明、及びナノエレクトロニクスにおいて関心が払われるナノメートルサイズのナノ結晶への破壊をより起こしやすい。
特許請求の範囲を解釈するために、概要及び要約の項ではなく、詳細な説明の項が使用されるように意図されることが認識される。概要及び概要の項は、本発明者等によって企図された本発明の例示的な実施形態又は利点の1つ又はそれ以上を説明するが、それらの全てを説明するものではなく、従って、本発明及び添付の特許請求の範囲を、何らかの形で限定することを意図したものではい。
104:電解液
106:電源
108:白金線
110、112:計測装置
114:基準電極
202:非エッチング領域
204:NP GaN形成領域
206:完全な層除去又は電解研磨領域
302、304、306、1418:平面SEM像
308:断面SEM像
404、604:低電圧
406、606:高電圧
408:高多孔率及び低多孔率の層
410、412、414、416、608、702、704、920、930、934、1104、1108、1112:特徴部
510、610、1024:低多孔率層
512、612、1026:高多孔率層
706、1304、1410:NP GaN層
708:非多孔質GaN層
710、816、826:サファイア基板
812:MQW・LED構造体
814、822、824:非ドープGaN層
820:多重量子井戸(MQW)構造体
828:埋込みNP GaN層
904、906:NP層
932、1310、1314:ボイド
1018:均一にドープされたGaN層
1020、1024:ナノ孔
1030:連続結晶層
1216、1402:GaN基板
1312:GaN層又はデバイス
1320、1330:NP基板
1322:デバイス構造体
1324:キャリア・ウェハ
1326/1328:組み合わせられたデバイス構造体/キャリア・ウェハ・システム
1406:エピ層
1416:サファイア
1506、1510、1512、1516:GaNのNC(ナノ結晶)
1610:自立型浮遊NP GaN膜
1808:NP GaN又はInGaN電極
1810:金属電極
1812:水
1814:酸素
1815:水素
1904:電流飽和
Claims (27)
- 多孔質GaNを生成する方法であって、
n型GaNを、シュウ酸、KOH又はHCLを含む電解液に曝すステップと、ここでn型GaNのドーピング濃度は2×1018cm-3よりも大きく、
前記n型GaNを電源の一の端子に結合し、前記電解液中に浸漬された電極を前記電源の他の端子に結合して回路を形成するステップと、
前記一の端子及び他の端子に5Vから30Vまでの間の電圧を印加するステップと、
前記n型GaNの少なくとも一部分を多孔質化するために、UV光を照射することなく200nm/分のエッチング速度で前記n型GaNをエッチングするステップと、
を含むことを特徴とする方法。 - サファイア、シリコン、炭化シリコン、又はバルクGaNを含む基板上に、前記n型GaNをエピタキシャル形成するステップをさらに含むことを特徴とする、請求項1に記載の方法。
- 前記n型GaNは前記電源の正端子に結合されることを特徴とする、請求項1に記載の方法。
- 前記電圧を印加するステップは、前記GaNの多孔率を調節するために、印加電圧を制御するステップをさらに含むことを特徴とする、請求項1に記載の方法。
- 対応する多孔率プロファイルを前記n型GaNに生成するために、前記電圧を印加するステップの前に、前記n型GaNにおいてドーピング・プロファイルを形成するステップをさらに含むことを特徴とする、請求項2に記載の方法。
- 前記電圧を印加するステップは、時間の関数として、印加電圧を5Vから30Vまでの間の範囲内の低値と高値の間で制御して、変化する多孔率プロファイルを生成するステップをさらに含むことを特徴とする、請求項2に記載の方法。
- n型GaNの多層構造を形成するステップをさらに含み、前記電圧を印加するステップは、1/4波長分布ブラッグ反射器(DBR)の屈折率の周期性を有する多孔率プロファイルを生成することを特徴とする、請求項1に記載の方法。
- 前記n型GaNは均一にドープされ、前記電圧を印加するステップは、1/4波長分布ブラッグ反射器(DBR)の屈折率の周期性を有する多孔率プロファイルが前記n型GaNに形成されるように低値と高値の間で印加する電圧を変える、ことを特徴とする、請求項1に記載の方法。
- 前記n型GaNの上に発光する活性構造体を形成するステップをさらに含み、前記電圧を印加するステップは、前記n型GaNをナノ多孔質GaN層に変換し、前記発光する活性構造体からの光抽出を増強することを特徴とする、請求項1に記載の方法。
- 前記n型GaN中にドーピング・プロファイルを形成するステップと、
前記n型GaNをエッチングしてナノ多孔質テンプレートを形成するステップと、
をさらに含むことを特徴とする、請求項1に記載の方法。 - 前記テンプレート上に、発光ダイオードを形成するステップをさらに含み、前記発光ダイオードは、
n型GaN層と、
p型GaN層と、
前記n型GaN層及び前記p型GaN層の間のInGaN/GaN活性層と、
を含むことを特徴とする、請求項10に記載の方法。 - 前記n型GaN中にドーピング・プロファイルを形成するステップと、
前記n型GaNをエッチングして、第1の低多孔率の連続結晶層と、前記第1の層の下の第2の高多孔率層とを形成するステップと、
をさらに含み、前記第2の層は、前記基板からの前記第1の低多孔率の連続結晶層の分離を容易にするように、前記高多孔率によって脆弱にされていることを特徴とする、請求項1に記載の方法。 - 前記エッチングは、
第1の継続時間T1の間、第1の電圧V1を印加するステップと、
第2の継続時間T2の間、前記第1の電圧V1と異なる第2の電圧V2を印加するステップと、
を含むことを特徴とする、請求項12に記載の方法。 - 前記ドーピング濃度は5×1018cm-3であり、V1は前記第1の継続時間T1の間10Vであり、V2は前記第2の継続時間T2の間15Vであることを特徴とする、請求項13に記載の方法。
- 前記n型GaNをドープして、第1のドーピング濃度N1を有する第1の層と、ドーピング濃度N2の第2の層とを形成するステップと、
一定の電圧を印加するステップと、
をさらに含むことを特徴とする、請求項12に記載の方法。 - 前記n型GaNを、濃度N1=3×1018cm-3、及びN2=1×1019cm-3でドープするステップと、
12Vで前記電圧を印加するステップと、
をさらに含むことを特徴とする、請求項15に記載の方法。 - 電解液中で前記低多孔率の連続結晶層が前記基板から完全に分離するまで、前記エッチング・プロセスをさらに継続することを特徴とする、請求項12に記載の方法。
- サファイア、シリコン、炭化シリコン、又はバルクGaNを含む基板上に前記n型GaNを配置するステップをさらに含むことを特徴とする、請求項12に記載の方法。
- エピタキシャル成長技術を用いて、前記多孔率プロファイル上にデバイス又はエピタキシャル構造体を成長させるステップと、
ボイドが形成されるように前記多孔率プロファイルをアニールすることによって、前記デバイス又はエピタキシャル構造体の下に、機械的強度が脆弱にされた埋込みボイド層を形成するステップと、
キャリア・ウェハを前記デバイス又はエピタキシャル構造体の表面にウェハ接合するステップと、
前記埋込みボイド層において、前記基板から前記デバイス又はエピタキシャル構造体及び前記キャリア・ウェハをへき開するステップと、
をさらに含むことを特徴とする、請求項5又は6に記載の方法。 - 前記基板上のn型GaNの残りの部分を研磨し、前記電圧の印加、前記デバイス又はエピタキシャル構造体の成長、前記埋込みボイド層の形成を繰り返すステップをさらに含むことを特徴とする、請求項19に記載の方法。
- MOCVD、HVPE、又はMBEのうちの1つであるエピタキシャル法を用いて、前記デバイス構造体を成長させるステップをさらに含むことを特徴とする、請求項19に記載の方法。
- サファイア、シリコン、炭化シリコン、又はバルクGaNを含む基板上に前記GaNを配置するステップをさらに含むことを特徴とする、請求項12に記載の方法。
- ナノ結晶を製造する方法であって、
GaN又はInGaNのn型ドープ表面層を含む基板を準備するステップと、ここで前記ドープ表面層のドーピング濃度は2×1018cm-3よりも大きく、
前記ドープ表面層をシュウ酸、KOH又はHCLを含む電解液に曝すステップと、
前記ドープ表面層を電源の一の端子に結合し、前記電解液中に浸漬された電極を前記電源の他の端子に結合して回路を形成するステップと、
前記回路を通る電流を駆動するために前記回路に5Vから30Vまでの間の電圧を印加するステップと、
前記ドープ表面層を多孔質化するために、UV光を照射することなく200nm/分のエッチング速度で前記GaN又はInGaNをエッチングするステップと、
多孔質化された前記表面層に機械的撹乱をもたらし、前記多孔質化された表面層を破壊してナノ結晶にするステップをさらに含むことを特徴とする方法。 - 超音波発生装置を用いて、音波の形態の前記機械的撹乱をもたらすステップをさらに含むことを特徴とする、請求項23に記載の方法。
- 電極を製造する方法であって、
GaN又はInGaNのn型ドープ表面層を含む基板を準備するステップと、ここで前記ドープ表面層のドーピング濃度は2×1018cm-3よりも大きく、
前記ドープ表面層をシュウ酸、KOH又はHCLを含む電解液に曝すステップと、
前記ドープ表面層を電源の一の端子に結合し、前記電解液中に浸漬された電極を前記電源の他の端子に結合して回路を形成するステップと、
前記回路を通る電流を駆動するために前記回路に5Vから30Vまでの間の電圧を印加するステップと、
電気分解、水分解、又は光合成プロセスの用途のための電極として使用するのに適した構造体を生成するように、前記ドープ表面層を多孔質化するために、UV光を照射することなく200nm/分のエッチング速度で前記GaN又はInGaNをエッチングするステップと、
を含むことを特徴とする方法。 - 太陽光利用の効率的な水分解方法であって、
請求項25に記載の方法に従って製造された多孔質GaN又はInGaN電極のアノードを準備するステップと、
金属カソード電極を準備するステップと、
前記アノード及び前記カソードを電解液に曝すステップと、
電気回路を形成するように、前記アノード及び前記カソードを電気的に接続するステップと、
前記回路内に光電流を誘起するように、前記アノードを太陽放射に曝し、これにより光化学水分解の化学反応を推進するステップと、
を含むことを特徴とする方法。 - 多孔質GaNを生成する方法であって、
サファイア、シリコン、炭化シリコン、又はバルクGaNを含む基板上にn型GaNを配置して、ドーピング濃度が2×1018cm-3よりも大きいn型GaN層を形成するステップと、
シュウ酸、KOH又はHCLを含む電解液中で5Vから30Vまでの間の印加電圧で前記n型GaN層を、UV光を照射することなく200nm/分のエッチング速度でエッチングして、前記n型GaN層の少なくとも一部の多孔率プロファイルを形成するステップと、
前記n型GaN層の上にエピタキシャル層を形成するステップと、
前記多孔率プロファイル中にボイドを形成するためにアニールするステップと、
前記エピタキシャル層を前記基板から分離するステップと、
を含むことを特徴とする方法。
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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US11651954B2 (en) | 2017-09-27 | 2023-05-16 | Cambridge Enterprise Ltd | Method for porosifying a material and semiconductor structure |
US11631782B2 (en) | 2018-01-26 | 2023-04-18 | Cambridge Enterprise Limited | Method for electrochemically etching a semiconductor structure |
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EP3923352A1 (en) | 2021-12-15 |
WO2011094391A1 (en) | 2011-08-04 |
JP2016048794A (ja) | 2016-04-07 |
US20130011656A1 (en) | 2013-01-10 |
EP2529394A1 (en) | 2012-12-05 |
JP2016181709A (ja) | 2016-10-13 |
US9206524B2 (en) | 2015-12-08 |
EP2529394A4 (en) | 2017-11-15 |
KR20130007557A (ko) | 2013-01-18 |
JP2013518447A (ja) | 2013-05-20 |
CN102782818A (zh) | 2012-11-14 |
CN105821435A (zh) | 2016-08-03 |
US10458038B2 (en) | 2019-10-29 |
US20160153113A1 (en) | 2016-06-02 |
CN102782818B (zh) | 2016-04-27 |
CN105821435B (zh) | 2018-10-16 |
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