JP5905679B2 - 半導体装置の作製方法 - Google Patents
半導体装置の作製方法 Download PDFInfo
- Publication number
- JP5905679B2 JP5905679B2 JP2011170916A JP2011170916A JP5905679B2 JP 5905679 B2 JP5905679 B2 JP 5905679B2 JP 2011170916 A JP2011170916 A JP 2011170916A JP 2011170916 A JP2011170916 A JP 2011170916A JP 5905679 B2 JP5905679 B2 JP 5905679B2
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- insulating layer
- oxide
- layer
- oxide semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
- G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/70—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B99/00—Subject matter not provided for in other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
- H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Memories (AREA)
- Thin Film Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Non-Volatile Memory (AREA)
- Dram (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011170916A JP5905679B2 (ja) | 2010-08-06 | 2011-08-04 | 半導体装置の作製方法 |
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2010177874 | 2010-08-06 | ||
| JP2010177874 | 2010-08-06 | ||
| JP2011108422 | 2011-05-13 | ||
| JP2011108422 | 2011-05-13 | ||
| JP2011170916A JP5905679B2 (ja) | 2010-08-06 | 2011-08-04 | 半導体装置の作製方法 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016053659A Division JP6194148B2 (ja) | 2010-08-06 | 2016-03-17 | 半導体装置及び半導体装置の作製方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2012256816A JP2012256816A (ja) | 2012-12-27 |
| JP2012256816A5 JP2012256816A5 (enExample) | 2014-09-11 |
| JP5905679B2 true JP5905679B2 (ja) | 2016-04-20 |
Family
ID=45555458
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011170916A Active JP5905679B2 (ja) | 2010-08-06 | 2011-08-04 | 半導体装置の作製方法 |
| JP2016053659A Expired - Fee Related JP6194148B2 (ja) | 2010-08-06 | 2016-03-17 | 半導体装置及び半導体装置の作製方法 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016053659A Expired - Fee Related JP6194148B2 (ja) | 2010-08-06 | 2016-03-17 | 半導体装置及び半導体装置の作製方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US8792284B2 (enExample) |
| JP (2) | JP5905679B2 (enExample) |
| KR (1) | KR101791267B1 (enExample) |
| TW (1) | TWI523146B (enExample) |
Families Citing this family (35)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012014790A1 (en) * | 2010-07-27 | 2012-02-02 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| US8520426B2 (en) | 2010-09-08 | 2013-08-27 | Semiconductor Energy Laboratory Co., Ltd. | Method for driving semiconductor device |
| US8569754B2 (en) | 2010-11-05 | 2013-10-29 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| US9287405B2 (en) | 2011-10-13 | 2016-03-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device comprising oxide semiconductor |
| KR20140086954A (ko) * | 2011-10-28 | 2014-07-08 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 및 그 제작 방법 |
| US8901556B2 (en) | 2012-04-06 | 2014-12-02 | Semiconductor Energy Laboratory Co., Ltd. | Insulating film, method for manufacturing semiconductor device, and semiconductor device |
| US8980653B2 (en) * | 2012-09-19 | 2015-03-17 | Intermolecular, Inc. | Combinatorial optimization of interlayer parameters |
| US9437273B2 (en) | 2012-12-26 | 2016-09-06 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| US9318484B2 (en) * | 2013-02-20 | 2016-04-19 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| JP6405097B2 (ja) | 2013-02-28 | 2018-10-17 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| KR20150128820A (ko) | 2013-03-14 | 2015-11-18 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치의 구동 방법 및 반도체 장치 |
| KR20150128823A (ko) | 2013-03-14 | 2015-11-18 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치의 구동 방법 및 반도체 장치 |
| US9893192B2 (en) * | 2013-04-24 | 2018-02-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| TWI618058B (zh) * | 2013-05-16 | 2018-03-11 | 半導體能源研究所股份有限公司 | 半導體裝置 |
| US9196582B2 (en) * | 2013-11-22 | 2015-11-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Word line coupling prevention using 3D integrated circuit |
| KR102283814B1 (ko) * | 2013-12-25 | 2021-07-29 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 |
| US9349418B2 (en) | 2013-12-27 | 2016-05-24 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for driving the same |
| US9887212B2 (en) | 2014-03-14 | 2018-02-06 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and electronic device |
| US9716100B2 (en) | 2014-03-14 | 2017-07-25 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, method for driving semiconductor device, and electronic device |
| US20160155849A1 (en) * | 2014-12-02 | 2016-06-02 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, method for manufacturing semiconductor device, module, and electronic device |
| JP6667267B2 (ja) | 2014-12-08 | 2020-03-18 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| JP6689062B2 (ja) | 2014-12-10 | 2020-04-28 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| WO2016092416A1 (en) | 2014-12-11 | 2016-06-16 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, memory device, and electronic device |
| US9905700B2 (en) | 2015-03-13 | 2018-02-27 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device or memory device and driving method thereof |
| KR20160117222A (ko) | 2015-03-30 | 2016-10-10 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치의 검사 방법 |
| US9589611B2 (en) * | 2015-04-01 | 2017-03-07 | Semiconductor Energy Laboratory Co., Ltd. | Memory device, semiconductor device, and electronic device |
| KR102415409B1 (ko) * | 2015-09-09 | 2022-07-04 | 에스케이하이닉스 주식회사 | 이피롬 셀 및 그 제조방법과, 이피롬 셀 어레이 |
| JP6822853B2 (ja) | 2016-01-21 | 2021-01-27 | 株式会社半導体エネルギー研究所 | 記憶装置及び記憶装置の駆動方法 |
| JP6963463B2 (ja) | 2016-11-10 | 2021-11-10 | 株式会社半導体エネルギー研究所 | 半導体装置、電子部品、及び電子機器 |
| TW201836020A (zh) * | 2017-02-17 | 2018-10-01 | 日商半導體能源研究所股份有限公司 | 半導體裝置及半導體裝置的製造方法 |
| CA3030723C (en) | 2019-01-21 | 2024-06-04 | Mitchell B. Miller | A system and method for bidirectionally based electrical information storage, processing and communication |
| JP7560469B2 (ja) * | 2019-10-04 | 2024-10-02 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| DE102020130131B4 (de) | 2020-05-28 | 2025-12-11 | Taiwan Semiconductor Manufacturing Co., Ltd. | Halbleitervorrichtung und deren herstellungsverfahren |
| US11450748B2 (en) * | 2020-05-28 | 2022-09-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device and manufacturing method thereof |
| US11916121B2 (en) | 2020-06-29 | 2024-02-27 | Taiwan Semiconductor Manufacturing Company Limited | Tri-gate orthogonal channel transistor and methods of forming the same |
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Also Published As
| Publication number | Publication date |
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| JP2012256816A (ja) | 2012-12-27 |
| KR101791267B1 (ko) | 2017-10-27 |
| KR20120022612A (ko) | 2012-03-12 |
| TW201230247A (en) | 2012-07-16 |
| US9263473B2 (en) | 2016-02-16 |
| US20120032164A1 (en) | 2012-02-09 |
| JP6194148B2 (ja) | 2017-09-06 |
| JP2016146499A (ja) | 2016-08-12 |
| US20140332802A1 (en) | 2014-11-13 |
| US8792284B2 (en) | 2014-07-29 |
| TWI523146B (zh) | 2016-02-21 |
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