JP5764370B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP5764370B2
JP5764370B2 JP2011088799A JP2011088799A JP5764370B2 JP 5764370 B2 JP5764370 B2 JP 5764370B2 JP 2011088799 A JP2011088799 A JP 2011088799A JP 2011088799 A JP2011088799 A JP 2011088799A JP 5764370 B2 JP5764370 B2 JP 5764370B2
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Prior art keywords
transistor
potential
source
drain
electrode
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Expired - Fee Related
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JP2011088799A
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Japanese (ja)
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JP2011238334A5 (enExample
JP2011238334A (ja
Inventor
修平 長塚
修平 長塚
加藤　清
清 加藤
隆徳 松嵜
隆徳 松嵜
広樹 井上
広樹 井上
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Publication of JP2011238334A5 publication Critical patent/JP2011238334A5/ja
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4093—Input/output [I/O] data interface arrangements, e.g. data buffers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/405—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4085—Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/70—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Databases & Information Systems (AREA)
  • Semiconductor Memories (AREA)
  • Thin Film Transistor (AREA)
  • Dram (AREA)
  • Non-Volatile Memory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Physical Vapour Deposition (AREA)
JP2011088799A 2010-04-16 2011-04-13 半導体装置 Expired - Fee Related JP5764370B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2011088799A JP5764370B2 (ja) 2010-04-16 2011-04-13 半導体装置

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2010095196 2010-04-16
JP2010095196 2010-04-16
JP2011088799A JP5764370B2 (ja) 2010-04-16 2011-04-13 半導体装置

Related Child Applications (2)

Application Number Title Priority Date Filing Date
JP2013104197A Division JP5604560B2 (ja) 2010-04-16 2013-05-16 半導体装置
JP2015120001A Division JP2015201250A (ja) 2010-04-16 2015-06-15 半導体装置

Publications (3)

Publication Number Publication Date
JP2011238334A JP2011238334A (ja) 2011-11-24
JP2011238334A5 JP2011238334A5 (enExample) 2014-05-22
JP5764370B2 true JP5764370B2 (ja) 2015-08-19

Family

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Family Applications (3)

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JP2011088799A Expired - Fee Related JP5764370B2 (ja) 2010-04-16 2011-04-13 半導体装置
JP2013104197A Expired - Fee Related JP5604560B2 (ja) 2010-04-16 2013-05-16 半導体装置
JP2015120001A Withdrawn JP2015201250A (ja) 2010-04-16 2015-06-15 半導体装置

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JP2013104197A Expired - Fee Related JP5604560B2 (ja) 2010-04-16 2013-05-16 半導体装置
JP2015120001A Withdrawn JP2015201250A (ja) 2010-04-16 2015-06-15 半導体装置

Country Status (5)

Country Link
US (1) US8411480B2 (enExample)
JP (3) JP5764370B2 (enExample)
KR (1) KR101904445B1 (enExample)
TW (1) TWI517157B (enExample)
WO (1) WO2011129233A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012252766A (ja) * 2010-09-02 2012-12-20 Semiconductor Energy Lab Co Ltd 半導体装置の駆動方法

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WO2011058934A1 (en) 2009-11-13 2011-05-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and driving method thereof
CN102754162B (zh) * 2010-02-19 2015-12-09 株式会社半导体能源研究所 半导体器件及半导体器件的驱动方法
KR101891065B1 (ko) * 2010-03-19 2018-08-24 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치 구동 방법
KR101884031B1 (ko) * 2010-04-07 2018-07-31 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 기억 장치
KR101904445B1 (ko) * 2010-04-16 2018-10-04 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
US8416622B2 (en) 2010-05-20 2013-04-09 Semiconductor Energy Laboratory Co., Ltd. Driving method of a semiconductor device with an inverted period having a negative potential applied to a gate of an oxide semiconductor transistor
US8779433B2 (en) 2010-06-04 2014-07-15 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
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US8422272B2 (en) 2010-08-06 2013-04-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and driving method thereof
US8467231B2 (en) 2010-08-06 2013-06-18 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and driving method thereof
JP5852874B2 (ja) 2010-12-28 2016-02-03 株式会社半導体エネルギー研究所 半導体装置
JP6013682B2 (ja) 2011-05-20 2016-10-25 株式会社半導体エネルギー研究所 半導体装置の駆動方法
JP6013685B2 (ja) * 2011-07-22 2016-10-25 株式会社半導体エネルギー研究所 半導体装置
TWI580047B (zh) * 2011-12-23 2017-04-21 半導體能源研究所股份有限公司 半導體裝置
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US9054678B2 (en) * 2012-07-06 2015-06-09 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and driving method thereof
KR102107591B1 (ko) * 2012-07-18 2020-05-07 가부시키가이샤 한도오따이 에네루기 켄큐쇼 기억 소자 및 프로그래머블 로직 디바이스
KR102112364B1 (ko) * 2012-12-06 2020-05-18 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
KR20150128820A (ko) 2013-03-14 2015-11-18 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치의 구동 방법 및 반도체 장치
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