JP5661227B2 - メモリコントローラ - Google Patents

メモリコントローラ Download PDF

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Publication number
JP5661227B2
JP5661227B2 JP2007028167A JP2007028167A JP5661227B2 JP 5661227 B2 JP5661227 B2 JP 5661227B2 JP 2007028167 A JP2007028167 A JP 2007028167A JP 2007028167 A JP2007028167 A JP 2007028167A JP 5661227 B2 JP5661227 B2 JP 5661227B2
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JP
Japan
Prior art keywords
data
memory
area
memory controller
refresh target
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Expired - Fee Related
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JP2007028167A
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English (en)
Japanese (ja)
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JP2008192266A (ja
JP2008192266A5 (enExample
Inventor
史明 塚嵜
史明 塚嵜
哲生 古都
哲生 古都
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MegaChips Corp
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MegaChips Corp
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Publication date
Application filed by MegaChips Corp filed Critical MegaChips Corp
Priority to JP2007028167A priority Critical patent/JP5661227B2/ja
Priority to US11/968,492 priority patent/US7663933B2/en
Publication of JP2008192266A publication Critical patent/JP2008192266A/ja
Publication of JP2008192266A5 publication Critical patent/JP2008192266A5/ja
Application granted granted Critical
Publication of JP5661227B2 publication Critical patent/JP5661227B2/ja
Expired - Fee Related legal-status Critical Current
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G11C16/3431—Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step

Landscapes

  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System (AREA)
JP2007028167A 2007-02-07 2007-02-07 メモリコントローラ Expired - Fee Related JP5661227B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2007028167A JP5661227B2 (ja) 2007-02-07 2007-02-07 メモリコントローラ
US11/968,492 US7663933B2 (en) 2007-02-07 2008-01-02 Memory controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007028167A JP5661227B2 (ja) 2007-02-07 2007-02-07 メモリコントローラ

Publications (3)

Publication Number Publication Date
JP2008192266A JP2008192266A (ja) 2008-08-21
JP2008192266A5 JP2008192266A5 (enExample) 2010-05-13
JP5661227B2 true JP5661227B2 (ja) 2015-01-28

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007028167A Expired - Fee Related JP5661227B2 (ja) 2007-02-07 2007-02-07 メモリコントローラ

Country Status (2)

Country Link
US (1) US7663933B2 (enExample)
JP (1) JP5661227B2 (enExample)

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US11307918B2 (en) 2018-11-16 2022-04-19 Samsung Electronics Co., Ltd. Memory controller performing recovery operation, operating method of the same, and memory system including the same

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KR102089532B1 (ko) * 2013-02-06 2020-03-16 삼성전자주식회사 메모리 컨트롤러, 메모리 시스템 및 메모리 시스템의 동작 방법
KR101976452B1 (ko) * 2013-04-22 2019-05-10 에스케이하이닉스 주식회사 반도체 장치
CN105229742A (zh) * 2013-04-30 2016-01-06 惠普发展公司，有限责任合伙企业 存储器访问速率
KR101529652B1 (ko) * 2013-06-25 2015-06-19 포항공과대학교 산학협력단 선택적 리프레시를 이용한 메모리 장치, 제어 방법 및 시스템
JP5981906B2 (ja) * 2013-12-17 2016-08-31 京セラドキュメントソリューションズ株式会社 画像形成装置
KR102318561B1 (ko) * 2014-08-19 2021-11-01 삼성전자주식회사 스토리지 장치, 스토리지 장치의 동작 방법
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JP6423282B2 (ja) * 2015-02-18 2018-11-14 ラピスセミコンダクタ株式会社 メモリ制御装置及びメモリ制御方法
JP6466295B2 (ja) * 2015-09-09 2019-02-06 株式会社東芝 映像収録再生装置、制御方法及びコンピュータプログラム
US20170075593A1 (en) * 2015-09-11 2017-03-16 Sandisk Technologies Inc. System and method for counter flush frequency
KR102530905B1 (ko) * 2016-02-15 2023-05-11 에스케이하이닉스 주식회사 메모리 시스템 및 그의 동작 방법
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KR102614083B1 (ko) 2016-08-31 2023-12-18 삼성전자주식회사 스토리지 장치 및 스토리지 장치의 동작 방법
JP6507187B2 (ja) * 2017-02-14 2019-04-24 株式会社三共 遊技機
KR20180108939A (ko) 2017-03-23 2018-10-05 에스케이하이닉스 주식회사 데이터 저장 장치 및 그것의 동작 방법
KR20190001417A (ko) * 2017-06-27 2019-01-04 에스케이하이닉스 주식회사 컨트롤러 및 그 동작 방법
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US10991411B2 (en) 2018-08-17 2021-04-27 Micron Technology, Inc. Method and apparatuses for performing a voltage adjustment operation on a section of memory cells based on a quantity of access operations
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JP2022112978A (ja) * 2021-01-22 2022-08-03 株式会社大一商会 遊技機
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11307918B2 (en) 2018-11-16 2022-04-19 Samsung Electronics Co., Ltd. Memory controller performing recovery operation, operating method of the same, and memory system including the same

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Publication number Publication date
US20080259708A1 (en) 2008-10-23
US7663933B2 (en) 2010-02-16
JP2008192266A (ja) 2008-08-21

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