JP5090610B2 - フリップチップボンディング用に事前にアンダーフィルを施したはんだバンプウエハの溶剤バニッシング - Google Patents
フリップチップボンディング用に事前にアンダーフィルを施したはんだバンプウエハの溶剤バニッシング Download PDFInfo
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- JP5090610B2 JP5090610B2 JP2002537050A JP2002537050A JP5090610B2 JP 5090610 B2 JP5090610 B2 JP 5090610B2 JP 2002537050 A JP2002537050 A JP 2002537050A JP 2002537050 A JP2002537050 A JP 2002537050A JP 5090610 B2 JP5090610 B2 JP 5090610B2
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- Prior art keywords
- adhesive
- chip
- bump
- bumps
- integrated circuit
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
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- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/1579—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/690,600 US7170185B1 (en) | 1997-12-08 | 2000-10-17 | Solvent assisted burnishing of pre-underfilled solder bumped wafers for flipchip bonding |
US09/690,600 | 2000-10-17 | ||
PCT/US2001/002385 WO2002033750A1 (en) | 2000-10-17 | 2001-01-25 | Solvent assisted burnishing of pre-underfilled solder-bumped wafers for flipchip bonding |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2004512684A JP2004512684A (ja) | 2004-04-22 |
JP2004512684A5 JP2004512684A5 (ko) | 2008-02-28 |
JP5090610B2 true JP5090610B2 (ja) | 2012-12-05 |
Family
ID=24773130
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2002537050A Expired - Fee Related JP5090610B2 (ja) | 2000-10-17 | 2001-01-25 | フリップチップボンディング用に事前にアンダーフィルを施したはんだバンプウエハの溶剤バニッシング |
Country Status (5)
Country | Link |
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EP (1) | EP1327264A1 (ko) |
JP (1) | JP5090610B2 (ko) |
KR (1) | KR100801945B1 (ko) |
CN (1) | CN1270375C (ko) |
WO (1) | WO2002033750A1 (ko) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003092311A (ja) * | 2001-09-17 | 2003-03-28 | Nagase & Co Ltd | 突起電極付icチップの実装方法 |
JP2003092310A (ja) * | 2001-09-17 | 2003-03-28 | Nagase & Co Ltd | 封止樹脂付突起電極付icチップとその製造方法 |
US20050129977A1 (en) | 2003-12-12 | 2005-06-16 | General Electric Company | Method and apparatus for forming patterned coated films |
JP2005347356A (ja) * | 2004-05-31 | 2005-12-15 | Sanyo Electric Co Ltd | 回路装置の製造方法 |
JP2006140432A (ja) * | 2004-10-15 | 2006-06-01 | Nippon Steel Corp | ウェハレベルパッケージの製造方法 |
DE102005046280B4 (de) | 2005-09-27 | 2007-11-08 | Infineon Technologies Ag | Halbleiterbauteil mit einem Halbleiterchip sowie Verfahren zur Herstellung desselben |
DE102006009478A1 (de) * | 2006-02-27 | 2007-08-30 | Infineon Technologies Ag | Verfahren und Substrat zum Flip-Chip-Bonden und Halbleiterbauelement |
JP4789190B2 (ja) * | 2006-03-29 | 2011-10-12 | 新日鐵化学株式会社 | バンプを備えた半導体装置の製造方法 |
US7867793B2 (en) * | 2007-07-09 | 2011-01-11 | Koninklijke Philips Electronics N.V. | Substrate removal during LED formation |
JP5152157B2 (ja) * | 2009-11-16 | 2013-02-27 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
JP2012039045A (ja) * | 2010-08-11 | 2012-02-23 | Nec Embedded Products Ltd | パッケージ、電子機器、パッケージ接続方法及びパッケージ修理方法 |
JP5662855B2 (ja) * | 2011-03-25 | 2015-02-04 | 株式会社日立製作所 | プリント基板の製造装置および製造方法 |
US20160280977A1 (en) * | 2015-03-24 | 2016-09-29 | IFS Industries Inc. | Two-Part Urethane Adhesive |
US10163847B2 (en) * | 2017-03-03 | 2018-12-25 | Tdk Corporation | Method for producing semiconductor package |
JP7382708B2 (ja) * | 2018-06-29 | 2023-11-17 | リンテック株式会社 | 実装方法 |
US11404600B2 (en) | 2019-06-11 | 2022-08-02 | Meta Platforms Technologies, Llc | Display device and its process for curing post-applied underfill material and bonding packaging contacts via pulsed lasers |
US11557692B2 (en) * | 2019-06-11 | 2023-01-17 | Meta Platforms Technologies, Llc | Selectively bonding light-emitting devices via a pulsed laser |
CN115938963B (zh) * | 2023-03-13 | 2023-05-23 | 深圳市光为光通信科技有限公司 | 一种基于硅基光电子集成芯片的光电共封装方法 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH03108210A (ja) * | 1989-09-21 | 1991-05-08 | Hitachi Chem Co Ltd | 異方導電性樹脂フィルム成形物の製造方法 |
JPH06506496A (ja) * | 1991-04-10 | 1994-07-21 | ミネソタ マイニング アンド マニュファクチャリング カンパニー | 低揮発性有機化合物の洗浄組成物及び方法 |
JP3376203B2 (ja) * | 1996-02-28 | 2003-02-10 | 株式会社東芝 | 半導体装置とその製造方法及びこの半導体装置を用いた実装構造体とその製造方法 |
JPH09330992A (ja) * | 1996-06-10 | 1997-12-22 | Ricoh Co Ltd | 半導体装置実装体とその製造方法 |
JP3137322B2 (ja) * | 1996-07-12 | 2001-02-19 | 富士通株式会社 | 半導体装置の製造方法及び半導体装置製造用金型及び半導体装置 |
JPH10242211A (ja) * | 1996-12-24 | 1998-09-11 | Nitto Denko Corp | 半導体装置の製法 |
US6260264B1 (en) * | 1997-12-08 | 2001-07-17 | 3M Innovative Properties Company | Methods for making z-axis electrical connections |
JP3326382B2 (ja) * | 1998-03-26 | 2002-09-24 | 松下電器産業株式会社 | 半導体装置の製造方法 |
SG82001A1 (en) * | 1998-07-02 | 2001-07-24 | Nat Starch Chem Invest | Method of making an electronic component using reworkable underfill encapsulants |
JP2000040711A (ja) * | 1998-07-23 | 2000-02-08 | Sony Corp | 樹脂封止型半導体装置とその製造方法 |
JP2000077472A (ja) * | 1998-09-01 | 2000-03-14 | Hitachi Chem Co Ltd | 半導体装置 |
JP4249827B2 (ja) * | 1998-12-04 | 2009-04-08 | 株式会社ディスコ | 半導体ウェーハの製造方法 |
JP4598905B2 (ja) * | 1999-01-29 | 2010-12-15 | フリースケール セミコンダクター インコーポレイテッド | 半導体素子の製造方法 |
JP3413120B2 (ja) * | 1999-02-23 | 2003-06-03 | ローム株式会社 | チップ・オン・チップ構造の半導体装置 |
-
2001
- 2001-01-25 EP EP01906665A patent/EP1327264A1/en not_active Withdrawn
- 2001-01-25 WO PCT/US2001/002385 patent/WO2002033750A1/en active Application Filing
- 2001-01-25 KR KR1020037005262A patent/KR100801945B1/ko not_active IP Right Cessation
- 2001-01-25 JP JP2002537050A patent/JP5090610B2/ja not_active Expired - Fee Related
- 2001-01-25 CN CNB018173675A patent/CN1270375C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR100801945B1 (ko) | 2008-02-12 |
KR20030060913A (ko) | 2003-07-16 |
CN1270375C (zh) | 2006-08-16 |
JP2004512684A (ja) | 2004-04-22 |
WO2002033750A1 (en) | 2002-04-25 |
EP1327264A1 (en) | 2003-07-16 |
CN1470068A (zh) | 2004-01-21 |
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