JP4978998B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP4978998B2
JP4978998B2 JP2006511007A JP2006511007A JP4978998B2 JP 4978998 B2 JP4978998 B2 JP 4978998B2 JP 2006511007 A JP2006511007 A JP 2006511007A JP 2006511007 A JP2006511007 A JP 2006511007A JP 4978998 B2 JP4978998 B2 JP 4978998B2
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JP
Japan
Prior art keywords
power supply
bonding pad
terminal
signal
esd protection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2006511007A
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English (en)
Japanese (ja)
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JPWO2005088701A1 (ja
Inventor
工 加藤
英夫 原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP2006511007A priority Critical patent/JP4978998B2/ja
Publication of JPWO2005088701A1 publication Critical patent/JPWO2005088701A1/ja
Application granted granted Critical
Publication of JP4978998B2 publication Critical patent/JP4978998B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/611—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using diodes as protective elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Semiconductor Integrated Circuits (AREA)
JP2006511007A 2004-03-12 2005-03-11 半導体装置 Expired - Fee Related JP4978998B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2006511007A JP4978998B2 (ja) 2004-03-12 2005-03-11 半導体装置

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2004070380 2004-03-12
JP2004070380 2004-03-12
JP2006511007A JP4978998B2 (ja) 2004-03-12 2005-03-11 半導体装置
PCT/JP2005/004337 WO2005088701A1 (ja) 2004-03-12 2005-03-11 半導体装置

Publications (2)

Publication Number Publication Date
JPWO2005088701A1 JPWO2005088701A1 (ja) 2008-01-31
JP4978998B2 true JP4978998B2 (ja) 2012-07-18

Family

ID=34975862

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006511007A Expired - Fee Related JP4978998B2 (ja) 2004-03-12 2005-03-11 半導体装置

Country Status (6)

Country Link
US (1) US20070158817A1 (enExample)
JP (1) JP4978998B2 (enExample)
KR (1) KR20060127190A (enExample)
CN (1) CN1930676B (enExample)
TW (1) TW200535963A (enExample)
WO (1) WO2005088701A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10504860B2 (en) 2014-06-20 2019-12-10 Thine Electronics, Inc. Semiconductor device

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010103274A (ja) * 2008-10-23 2010-05-06 Nec Electronics Corp 半導体パッケージ
JP5071465B2 (ja) * 2009-11-11 2012-11-14 株式会社村田製作所 高周波モジュール
JP5703103B2 (ja) * 2011-04-13 2015-04-15 株式会社東芝 半導体装置及びｄｃ−ｄｃコンバータ
JP6514949B2 (ja) * 2015-04-23 2019-05-15 日立オートモティブシステムズ株式会社 オンチップノイズ保護回路を有する半導体チップ
CN105977938B (zh) * 2016-06-17 2018-09-25 中国电子科技集团公司第二十四研究所 芯片esd保护电路
KR102866504B1 (ko) * 2019-05-20 2025-10-01 삼성디스플레이 주식회사 표시 장치 및 그것을 포함하는 전자 장치
CN117546281A (zh) * 2021-07-16 2024-02-09 罗姆股份有限公司 I/o电路、半导体装置、单元库和设计半导体装置的电路的方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0372666A (ja) * 1989-08-11 1991-03-27 Toshiba Corp 半導体集積回路装置
JPH08148650A (ja) * 1994-11-22 1996-06-07 Nec Corp 半導体集積回路装置
JPH10173134A (ja) * 1996-12-16 1998-06-26 Nec Corp 半導体装置
JP2000208718A (ja) * 1999-01-19 2000-07-28 Matsushita Electric Ind Co Ltd 半導体装置
JP2001298157A (ja) * 2000-04-14 2001-10-26 Nec Corp 保護回路及びこれを搭載した半導体集積回路
JP2002110919A (ja) * 2000-09-27 2002-04-12 Toshiba Corp 静電破壊保護回路

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5430595A (en) * 1993-10-15 1995-07-04 Intel Corporation Electrostatic discharge protection circuit
US5781388A (en) * 1996-09-03 1998-07-14 Motorola, Inc. Non-breakdown triggered electrostatic discharge protection circuit for an integrated circuit and method therefor
US6078068A (en) * 1998-07-15 2000-06-20 Adaptec, Inc. Electrostatic discharge protection bus/die edge seal
US6204537B1 (en) * 1998-10-01 2001-03-20 Micron Technology, Inc. ESD protection scheme
US6445039B1 (en) * 1998-11-12 2002-09-03 Broadcom Corporation System and method for ESD Protection
JP3302665B2 (ja) * 1999-10-25 2002-07-15 ローム株式会社 半導体集積回路装置
US6624998B2 (en) * 2000-01-24 2003-09-23 Medtronic, Inc. Electrostatic discharge protection scheme in low potential drop environments
US6355960B1 (en) * 2000-09-18 2002-03-12 Vanguard International Semiconductor Corporation ESD protection for open drain I/O pad in integrated circuit with parasitic field FET devices
TWI222208B (en) * 2002-05-29 2004-10-11 Sanyo Electric Co Semiconductor integrated circuit device
US6798022B1 (en) * 2003-03-11 2004-09-28 Oki Electric Industry Co., Ltd. Semiconductor device with improved protection from electrostatic discharge
JP3732834B2 (ja) * 2003-04-17 2006-01-11 株式会社東芝 入力保護回路
JP3949647B2 (ja) * 2003-12-04 2007-07-25 Ｎｅｃエレクトロニクス株式会社 半導体集積回路装置
US7202114B2 (en) * 2004-01-13 2007-04-10 Intersil Americas Inc. On-chip structure for electrostatic discharge (ESD) protection
JP2005317830A (ja) * 2004-04-30 2005-11-10 Elpida Memory Inc 半導体装置、マルチチップパッケージ、およびワイヤボンディング方法
JP2006303110A (ja) * 2005-04-19 2006-11-02 Nec Electronics Corp 半導体装置
US7463466B2 (en) * 2005-10-24 2008-12-09 United Microelectronics Corp. Integrated circuit with ESD protection circuit

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0372666A (ja) * 1989-08-11 1991-03-27 Toshiba Corp 半導体集積回路装置
JPH08148650A (ja) * 1994-11-22 1996-06-07 Nec Corp 半導体集積回路装置
JPH10173134A (ja) * 1996-12-16 1998-06-26 Nec Corp 半導体装置
JP2000208718A (ja) * 1999-01-19 2000-07-28 Matsushita Electric Ind Co Ltd 半導体装置
JP2001298157A (ja) * 2000-04-14 2001-10-26 Nec Corp 保護回路及びこれを搭載した半導体集積回路
JP2002110919A (ja) * 2000-09-27 2002-04-12 Toshiba Corp 静電破壊保護回路

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10504860B2 (en) 2014-06-20 2019-12-10 Thine Electronics, Inc. Semiconductor device

Also Published As

Publication number Publication date
TW200535963A (en) 2005-11-01
WO2005088701A1 (ja) 2005-09-22
JPWO2005088701A1 (ja) 2008-01-31
CN1930676A (zh) 2007-03-14
KR20060127190A (ko) 2006-12-11
CN1930676B (zh) 2010-06-16
TWI355016B (enExample) 2011-12-21
US20070158817A1 (en) 2007-07-12

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