JP4927321B2 - 半導体記憶装置 - Google Patents

半導体記憶装置 Download PDF

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Publication number
JP4927321B2
JP4927321B2 JP2004183338A JP2004183338A JP4927321B2 JP 4927321 B2 JP4927321 B2 JP 4927321B2 JP 2004183338 A JP2004183338 A JP 2004183338A JP 2004183338 A JP2004183338 A JP 2004183338A JP 4927321 B2 JP4927321 B2 JP 4927321B2
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JP
Japan
Prior art keywords
transistor
memory device
semiconductor memory
read
write
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2004183338A
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English (en)
Japanese (ja)
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JP2006012878A5 (enExample
JP2006012878A (ja
Inventor
智之 石井
利之 峰
聡明 佐野
典史 亀代
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
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Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2004183338A priority Critical patent/JP4927321B2/ja
Priority to TW094117706A priority patent/TW200620286A/zh
Priority to CNB2005100781929A priority patent/CN100474592C/zh
Priority to US11/156,558 priority patent/US7375399B2/en
Publication of JP2006012878A publication Critical patent/JP2006012878A/ja
Publication of JP2006012878A5 publication Critical patent/JP2006012878A5/ja
Application granted granted Critical
Publication of JP4927321B2 publication Critical patent/JP4927321B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/405Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B10/00Static random access memory [SRAM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B10/00Static random access memory [SRAM] devices
    • H10B10/18Peripheral circuit regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0135Manufacturing their gate conductors
    • H10D84/0142Manufacturing their gate conductors the gate conductors having different shapes or dimensions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0144Manufacturing their gate insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10Aspects relating to interfaces of memory device to external buses
    • G11C2207/104Embedded memory devices, e.g. memories with a processing device on the same die or ASIC memory designs

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)
JP2004183338A 2004-06-22 2004-06-22 半導体記憶装置 Expired - Fee Related JP4927321B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2004183338A JP4927321B2 (ja) 2004-06-22 2004-06-22 半導体記憶装置
TW094117706A TW200620286A (en) 2004-06-22 2005-05-30 Semiconductor storage device
CNB2005100781929A CN100474592C (zh) 2004-06-22 2005-06-16 半导体存储器件
US11/156,558 US7375399B2 (en) 2004-06-22 2005-06-21 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004183338A JP4927321B2 (ja) 2004-06-22 2004-06-22 半導体記憶装置

Publications (3)

Publication Number Publication Date
JP2006012878A JP2006012878A (ja) 2006-01-12
JP2006012878A5 JP2006012878A5 (enExample) 2007-09-06
JP4927321B2 true JP4927321B2 (ja) 2012-05-09

Family

ID=35479701

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004183338A Expired - Fee Related JP4927321B2 (ja) 2004-06-22 2004-06-22 半導体記憶装置

Country Status (4)

Country Link
US (1) US7375399B2 (enExample)
JP (1) JP4927321B2 (enExample)
CN (1) CN100474592C (enExample)
TW (1) TW200620286A (enExample)

Families Citing this family (51)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006156471A (ja) * 2004-11-25 2006-06-15 Toshiba Corp 半導体装置および半導体装置の製造方法
JP2007081335A (ja) * 2005-09-16 2007-03-29 Renesas Technology Corp 半導体装置
US8648403B2 (en) 2006-04-21 2014-02-11 International Business Machines Corporation Dynamic memory cell structures
US7598561B2 (en) * 2006-05-05 2009-10-06 Silicon Storage Technolgy, Inc. NOR flash memory
US7485528B2 (en) 2006-07-14 2009-02-03 Micron Technology, Inc. Method of forming memory devices by performing halogen ion implantation and diffusion processes
KR100840651B1 (ko) * 2006-12-29 2008-06-24 동부일렉트로닉스 주식회사 고전압 소자의 이온주입 방법
JP4643617B2 (ja) * 2007-06-26 2011-03-02 株式会社東芝 不揮発性半導体記憶装置
US8294216B2 (en) * 2008-08-14 2012-10-23 Taiwan Semiconductor Manufacturing Company, Ltd. Integrating the formation of I/O and core MOS devices with MOS capacitors and resistors
KR101788521B1 (ko) 2009-10-30 2017-10-19 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
WO2011058934A1 (en) 2009-11-13 2011-05-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and driving method thereof
WO2011077946A1 (en) 2009-12-25 2011-06-30 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
CN102804360B (zh) 2009-12-25 2014-12-17 株式会社半导体能源研究所 半导体装置
WO2011114905A1 (en) 2010-03-19 2011-09-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor memory device
KR101884031B1 (ko) * 2010-04-07 2018-07-31 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 기억 장치
KR101904445B1 (ko) 2010-04-16 2018-10-04 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
TWI511236B (zh) * 2010-05-14 2015-12-01 Semiconductor Energy Lab 半導體裝置
US8422272B2 (en) * 2010-08-06 2013-04-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and driving method thereof
US8634228B2 (en) 2010-09-02 2014-01-21 Semiconductor Energy Laboratory Co., Ltd. Driving method of semiconductor device
JP2012256821A (ja) 2010-09-13 2012-12-27 Semiconductor Energy Lab Co Ltd 記憶装置
JP6030298B2 (ja) * 2010-12-28 2016-11-24 株式会社半導体エネルギー研究所 緩衝記憶装置及び信号処理回路
TWI501226B (zh) * 2011-05-20 2015-09-21 Semiconductor Energy Lab 記憶體裝置及驅動記憶體裝置的方法
JP6081171B2 (ja) 2011-12-09 2017-02-15 株式会社半導体エネルギー研究所 記憶装置
US9208849B2 (en) 2012-04-12 2015-12-08 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for driving semiconductor device, and electronic device
CN104321967B (zh) * 2012-05-25 2018-01-09 株式会社半导体能源研究所 可编程逻辑装置及半导体装置
KR102027443B1 (ko) * 2013-03-28 2019-11-04 에스케이하이닉스 주식회사 불휘발성 메모리소자 및 그 동작방법
JP6560508B2 (ja) 2014-03-13 2019-08-14 株式会社半導体エネルギー研究所 半導体装置
US9842842B2 (en) 2014-03-19 2017-12-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor memory device and semiconductor device and electronic device having the same
KR20150138026A (ko) 2014-05-29 2015-12-09 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
KR20160137148A (ko) * 2015-05-22 2016-11-30 에스케이하이닉스 주식회사 전자 장치
WO2017130082A1 (en) 2016-01-29 2017-08-03 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, electronic component, and electronic device
KR102458660B1 (ko) 2016-08-03 2022-10-26 가부시키가이샤 한도오따이 에네루기 켄큐쇼 표시 장치 및 전자 기기
CN109643572A (zh) 2016-09-12 2019-04-16 株式会社半导体能源研究所 存储装置及其工作方法、半导体装置、电子构件以及电子设备
WO2018073708A1 (en) 2016-10-20 2018-04-26 Semiconductor Energy Laboratory Co., Ltd. Storage device, driving method thereof, semiconductor device, electronic component, and electronic device
CN108172545A (zh) * 2016-12-08 2018-06-15 中芯国际集成电路制造(上海)有限公司 半导体器件及其形成方法
CN108269758B (zh) * 2016-12-29 2019-08-23 联华电子股份有限公司 半导体元件的制作方法
CN108573926B (zh) * 2017-03-09 2020-01-21 联华电子股份有限公司 半导体存储装置以及其制作方法
US10276794B1 (en) * 2017-10-31 2019-04-30 Taiwan Semiconductor Manufacturing Co., Ltd. Memory device and fabrication method thereof
US10468428B1 (en) * 2018-04-19 2019-11-05 Silicon Storage Technology, Inc. Split gate non-volatile memory cells and logic devices with FinFET structure, and method of making same
US10847364B2 (en) * 2018-05-10 2020-11-24 Kabushiki Kaisha Toshiba Laminated body and semiconductor device
US10727240B2 (en) 2018-07-05 2020-07-28 Silicon Store Technology, Inc. Split gate non-volatile memory cells with three-dimensional FinFET structure
US10937794B2 (en) 2018-12-03 2021-03-02 Silicon Storage Technology, Inc. Split gate non-volatile memory cells with FinFET structure and HKMG memory and logic gates, and method of making same
US10797142B2 (en) 2018-12-03 2020-10-06 Silicon Storage Technology, Inc. FinFET-based split gate non-volatile flash memory with extended source line FinFET, and method of fabrication
JP7303006B2 (ja) * 2019-03-29 2023-07-04 ラピスセミコンダクタ株式会社 半導体装置及び半導体装置の製造方法
US11362100B2 (en) 2020-03-24 2022-06-14 Silicon Storage Technology, Inc. FinFET split gate non-volatile memory cells with enhanced floating gate to floating gate capacitive coupling
CN114256251B (zh) * 2020-09-21 2025-05-13 硅存储技术股份有限公司 形成具有存储器单元、高压器件和逻辑器件的设备的方法
US12433014B2 (en) * 2022-04-12 2025-09-30 Globalfoundries U.S. Inc. Structure having different gate dielectric widths in different regions of substrate
US12347481B2 (en) * 2023-01-16 2025-07-01 Macronix International Co., Ltd. Universal memory for in-memory computing and operation method thereof
KR102730001B1 (ko) * 2023-04-14 2024-11-15 서울대학교산학협력단 랜덤 액세스 메모리 및 그 제조 방법
KR102649968B1 (ko) * 2023-05-25 2024-03-20 서울대학교산학협력단 커패시터리스 3차원 적층형 dram 소자 및 그 제조 방법
KR102741443B1 (ko) * 2023-07-26 2024-12-10 서울대학교산학협력단 커패시터리스 3차원 dram 소자 및 그 제조 방법
KR102741447B1 (ko) * 2023-07-26 2024-12-10 서울대학교산학협력단 커패시터리스 3차원 dram 소자 및 그 제조 방법

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06151459A (ja) * 1992-11-12 1994-05-31 Casio Comput Co Ltd 薄膜トランジスタの製造方法
US5615150A (en) * 1995-11-02 1997-03-25 Advanced Micro Devices, Inc. Control gate-addressed CMOS non-volatile cell that programs through gates of CMOS transistors
KR100248205B1 (ko) * 1997-06-25 2000-03-15 김영환 반도체 메모리 디바이스 및 그 형성방법
KR100253372B1 (ko) * 1997-12-08 2000-04-15 김영환 반도체 소자 및 그 제조방법
JP3113240B2 (ja) * 1999-02-24 2000-11-27 株式会社東芝 不揮発性半導体記憶装置とその製造方法
US6232631B1 (en) * 1998-12-21 2001-05-15 Vantis Corporation Floating gate memory cell structure with programming mechanism outside the read path
US6198140B1 (en) * 1999-09-08 2001-03-06 Denso Corporation Semiconductor device including several transistors and method of manufacturing the same
JP3749101B2 (ja) * 2000-09-14 2006-02-22 株式会社ルネサステクノロジ 半導体装置
JP2002368226A (ja) * 2001-06-11 2002-12-20 Sharp Corp 半導体装置、半導体記憶装置及びその製造方法、並びに携帯情報機器
US6787835B2 (en) * 2002-06-11 2004-09-07 Hitachi, Ltd. Semiconductor memories

Also Published As

Publication number Publication date
CN100474592C (zh) 2009-04-01
JP2006012878A (ja) 2006-01-12
TW200620286A (en) 2006-06-16
US20050280000A1 (en) 2005-12-22
TWI365453B (enExample) 2012-06-01
US7375399B2 (en) 2008-05-20
CN1713387A (zh) 2005-12-28

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