TWI365453B - - Google Patents

Info

Publication number
TWI365453B
TWI365453B TW094117706A TW94117706A TWI365453B TW I365453 B TWI365453 B TW I365453B TW 094117706 A TW094117706 A TW 094117706A TW 94117706 A TW94117706 A TW 94117706A TW I365453 B TWI365453 B TW I365453B
Authority
TW
Taiwan
Application number
TW094117706A
Other languages
Chinese (zh)
Other versions
TW200620286A (en
Inventor
Tomoyuki Ishii
Toshiyuki Mine
Toshiaki Sano
Norifumi Kameshiro
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Publication of TW200620286A publication Critical patent/TW200620286A/zh
Application granted granted Critical
Publication of TWI365453B publication Critical patent/TWI365453B/zh

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/405Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B10/00Static random access memory [SRAM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B10/00Static random access memory [SRAM] devices
    • H10B10/18Peripheral circuit regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0135Manufacturing their gate conductors
    • H10D84/0142Manufacturing their gate conductors the gate conductors having different shapes or dimensions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0144Manufacturing their gate insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10Aspects relating to interfaces of memory device to external buses
    • G11C2207/104Embedded memory devices, e.g. memories with a processing device on the same die or ASIC memory designs

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)
TW094117706A 2004-06-22 2005-05-30 Semiconductor storage device TW200620286A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004183338A JP4927321B2 (ja) 2004-06-22 2004-06-22 半導体記憶装置

Publications (2)

Publication Number Publication Date
TW200620286A TW200620286A (en) 2006-06-16
TWI365453B true TWI365453B (enExample) 2012-06-01

Family

ID=35479701

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094117706A TW200620286A (en) 2004-06-22 2005-05-30 Semiconductor storage device

Country Status (4)

Country Link
US (1) US7375399B2 (enExample)
JP (1) JP4927321B2 (enExample)
CN (1) CN100474592C (enExample)
TW (1) TW200620286A (enExample)

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US8294216B2 (en) * 2008-08-14 2012-10-23 Taiwan Semiconductor Manufacturing Company, Ltd. Integrating the formation of I/O and core MOS devices with MOS capacitors and resistors
KR101788521B1 (ko) 2009-10-30 2017-10-19 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
WO2011058934A1 (en) 2009-11-13 2011-05-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and driving method thereof
WO2011077946A1 (en) 2009-12-25 2011-06-30 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
CN102804360B (zh) 2009-12-25 2014-12-17 株式会社半导体能源研究所 半导体装置
WO2011114905A1 (en) 2010-03-19 2011-09-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor memory device
KR101884031B1 (ko) * 2010-04-07 2018-07-31 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 기억 장치
KR101904445B1 (ko) 2010-04-16 2018-10-04 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
TWI511236B (zh) * 2010-05-14 2015-12-01 Semiconductor Energy Lab 半導體裝置
US8422272B2 (en) * 2010-08-06 2013-04-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and driving method thereof
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TWI501226B (zh) * 2011-05-20 2015-09-21 Semiconductor Energy Lab 記憶體裝置及驅動記憶體裝置的方法
JP6081171B2 (ja) 2011-12-09 2017-02-15 株式会社半導体エネルギー研究所 記憶装置
US9208849B2 (en) 2012-04-12 2015-12-08 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for driving semiconductor device, and electronic device
CN104321967B (zh) * 2012-05-25 2018-01-09 株式会社半导体能源研究所 可编程逻辑装置及半导体装置
KR102027443B1 (ko) * 2013-03-28 2019-11-04 에스케이하이닉스 주식회사 불휘발성 메모리소자 및 그 동작방법
JP6560508B2 (ja) 2014-03-13 2019-08-14 株式会社半導体エネルギー研究所 半導体装置
US9842842B2 (en) 2014-03-19 2017-12-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor memory device and semiconductor device and electronic device having the same
KR20150138026A (ko) 2014-05-29 2015-12-09 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
KR20160137148A (ko) * 2015-05-22 2016-11-30 에스케이하이닉스 주식회사 전자 장치
WO2017130082A1 (en) 2016-01-29 2017-08-03 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, electronic component, and electronic device
KR102458660B1 (ko) 2016-08-03 2022-10-26 가부시키가이샤 한도오따이 에네루기 켄큐쇼 표시 장치 및 전자 기기
CN109643572A (zh) 2016-09-12 2019-04-16 株式会社半导体能源研究所 存储装置及其工作方法、半导体装置、电子构件以及电子设备
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CN108172545A (zh) * 2016-12-08 2018-06-15 中芯国际集成电路制造(上海)有限公司 半导体器件及其形成方法
CN108269758B (zh) * 2016-12-29 2019-08-23 联华电子股份有限公司 半导体元件的制作方法
CN108573926B (zh) * 2017-03-09 2020-01-21 联华电子股份有限公司 半导体存储装置以及其制作方法
US10276794B1 (en) * 2017-10-31 2019-04-30 Taiwan Semiconductor Manufacturing Co., Ltd. Memory device and fabrication method thereof
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US10937794B2 (en) 2018-12-03 2021-03-02 Silicon Storage Technology, Inc. Split gate non-volatile memory cells with FinFET structure and HKMG memory and logic gates, and method of making same
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JP7303006B2 (ja) * 2019-03-29 2023-07-04 ラピスセミコンダクタ株式会社 半導体装置及び半導体装置の製造方法
US11362100B2 (en) 2020-03-24 2022-06-14 Silicon Storage Technology, Inc. FinFET split gate non-volatile memory cells with enhanced floating gate to floating gate capacitive coupling
CN114256251B (zh) * 2020-09-21 2025-05-13 硅存储技术股份有限公司 形成具有存储器单元、高压器件和逻辑器件的设备的方法
US12433014B2 (en) * 2022-04-12 2025-09-30 Globalfoundries U.S. Inc. Structure having different gate dielectric widths in different regions of substrate
US12347481B2 (en) * 2023-01-16 2025-07-01 Macronix International Co., Ltd. Universal memory for in-memory computing and operation method thereof
KR102730001B1 (ko) * 2023-04-14 2024-11-15 서울대학교산학협력단 랜덤 액세스 메모리 및 그 제조 방법
KR102649968B1 (ko) * 2023-05-25 2024-03-20 서울대학교산학협력단 커패시터리스 3차원 적층형 dram 소자 및 그 제조 방법
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Also Published As

Publication number Publication date
CN100474592C (zh) 2009-04-01
JP4927321B2 (ja) 2012-05-09
JP2006012878A (ja) 2006-01-12
TW200620286A (en) 2006-06-16
US20050280000A1 (en) 2005-12-22
US7375399B2 (en) 2008-05-20
CN1713387A (zh) 2005-12-28

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees