JP4902558B2 - 半導体モジュールの製造方法 - Google Patents

半導体モジュールの製造方法 Download PDF

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Publication number
JP4902558B2
JP4902558B2 JP2008012240A JP2008012240A JP4902558B2 JP 4902558 B2 JP4902558 B2 JP 4902558B2 JP 2008012240 A JP2008012240 A JP 2008012240A JP 2008012240 A JP2008012240 A JP 2008012240A JP 4902558 B2 JP4902558 B2 JP 4902558B2
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JP
Japan
Prior art keywords
protrusion
metal plate
semiconductor
copper plate
main surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2008012240A
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English (en)
Japanese (ja)
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JP2008211189A (ja
JP2008211189A5 (https=
Inventor
芳央 岡山
康行 柳瀬
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP2008012240A priority Critical patent/JP4902558B2/ja
Priority to US12/022,812 priority patent/US7989359B2/en
Priority to CN2008101277478A priority patent/CN101303990B/zh
Publication of JP2008211189A publication Critical patent/JP2008211189A/ja
Publication of JP2008211189A5 publication Critical patent/JP2008211189A5/ja
Application granted granted Critical
Publication of JP4902558B2 publication Critical patent/JP4902558B2/ja
Expired - Fee Related legal-status Critical Current
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/01Manufacture or treatment
    • H10W74/014Manufacture or treatment using batch processing
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/04Manufacture or treatment of leadframes
    • H10W70/042Etching
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/0198Manufacture or treatment batch processes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65Shapes or dispositions of interconnections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65Shapes or dispositions of interconnections
    • H10W70/654Top-view layouts
    • H10W70/656Fan-in layouts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/012Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01221Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using local deposition
    • H10W72/01223Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using local deposition in liquid form, e.g. by dispensing droplets or by screen printing
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/013Manufacture or treatment of die-attach connectors
    • H10W72/01331Manufacture or treatment of die-attach connectors using blanket deposition
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/019Manufacture or treatment of bond pads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241Dispositions, e.g. layouts
    • H10W72/244Dispositions, e.g. layouts relative to underlying supporting features, e.g. bond pads, RDLs or vias
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251Materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251Materials
    • H10W72/252Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29Bond pads specially adapted therefor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/921Structures or relative sizes of bond pads
    • H10W72/922Bond pads being integral with underlying chip-level interconnections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/951Materials of bond pads
    • H10W72/952Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/726Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2008012240A 2007-01-31 2008-01-23 半導体モジュールの製造方法 Expired - Fee Related JP4902558B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2008012240A JP4902558B2 (ja) 2007-01-31 2008-01-23 半導体モジュールの製造方法
US12/022,812 US7989359B2 (en) 2007-01-31 2008-01-30 Semiconductor module manufacturing method, semiconductor module, and mobile device
CN2008101277478A CN101303990B (zh) 2007-01-31 2008-01-31 半导体模块的制造方法、半导体模块及便携设备

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2007020657 2007-01-31
JP2007020657 2007-01-31
JP2008012240A JP4902558B2 (ja) 2007-01-31 2008-01-23 半導体モジュールの製造方法

Publications (3)

Publication Number Publication Date
JP2008211189A JP2008211189A (ja) 2008-09-11
JP2008211189A5 JP2008211189A5 (https=) 2011-03-03
JP4902558B2 true JP4902558B2 (ja) 2012-03-21

Family

ID=39787193

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008012240A Expired - Fee Related JP4902558B2 (ja) 2007-01-31 2008-01-23 半導体モジュールの製造方法

Country Status (3)

Country Link
US (1) US7989359B2 (https=)
JP (1) JP4902558B2 (https=)
CN (1) CN101303990B (https=)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100823699B1 (ko) * 2006-11-29 2008-04-21 삼성전자주식회사 플립칩 어셈블리 및 그 제조 방법
JP2008211125A (ja) * 2007-02-28 2008-09-11 Spansion Llc 半導体装置およびその製造方法
JP4760930B2 (ja) * 2009-02-27 2011-08-31 株式会社デンソー Ic搭載基板、多層プリント配線板、及び製造方法
JP2010262992A (ja) * 2009-04-30 2010-11-18 Sanyo Electric Co Ltd 半導体モジュールおよび携帯機器
TWI501376B (zh) * 2009-10-07 2015-09-21 精材科技股份有限公司 晶片封裝體及其製造方法
US9484259B2 (en) 2011-09-21 2016-11-01 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming protection and support structure for conductive interconnect structure
US9082832B2 (en) * 2011-09-21 2015-07-14 Stats Chippac, Ltd. Semiconductor device and method of forming protection and support structure for conductive interconnect structure
US8664039B2 (en) * 2011-10-18 2014-03-04 Taiwan Semiconductor Manufacturing Company, Ltd. Methods and apparatus for alignment in flip chip bonding
JP5624699B1 (ja) * 2012-12-21 2014-11-12 パナソニック株式会社 電子部品パッケージおよびその製造方法
JP7244339B2 (ja) * 2019-04-19 2023-03-22 株式会社三社電機製作所 半導体モジュール用外部端子
CN110164839B (zh) * 2019-05-27 2020-01-31 广东工业大学 一种高密度线路嵌入转移的扇出型封装结构与方法
JP7622571B2 (ja) * 2021-07-08 2025-01-28 住友電装株式会社 回路構成体、及び電気接続箱

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5821627A (en) * 1993-03-11 1998-10-13 Kabushiki Kaisha Toshiba Electronic circuit device
JP3533284B2 (ja) 1996-04-24 2004-05-31 新光電気工業株式会社 半導体装置用基板及びその製造方法並びに半導体装置
AU6418998A (en) * 1997-03-21 1998-10-20 Seiko Epson Corporation Semiconductor device, film carrier tape, and method for manufacturing them
JP2000068641A (ja) 1998-08-20 2000-03-03 Mitsubishi Gas Chem Co Inc プリント配線板の製造方法
MY144574A (en) * 1998-09-14 2011-10-14 Ibiden Co Ltd Printed circuit board and method for its production
JP2001053195A (ja) * 1999-08-11 2001-02-23 Mitsui High Tec Inc 半導体装置の製造方法
JP2001223287A (ja) * 2000-02-07 2001-08-17 Mitsui High Tec Inc インターポーザーの製造方法
JP3767398B2 (ja) * 2001-03-19 2006-04-19 カシオ計算機株式会社 半導体装置およびその製造方法
JP2006310530A (ja) * 2005-04-28 2006-11-09 Sanyo Electric Co Ltd 回路装置およびその製造方法
JP4568215B2 (ja) * 2005-11-30 2010-10-27 三洋電機株式会社 回路装置および回路装置の製造方法

Also Published As

Publication number Publication date
US20080284012A1 (en) 2008-11-20
US7989359B2 (en) 2011-08-02
CN101303990A (zh) 2008-11-12
JP2008211189A (ja) 2008-09-11
CN101303990B (zh) 2011-08-24

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