JP2008211189A - 半導体モジュールの製造方法、半導体モジュール、携帯機器 - Google Patents
半導体モジュールの製造方法、半導体モジュール、携帯機器 Download PDFInfo
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- JP2008211189A JP2008211189A JP2008012240A JP2008012240A JP2008211189A JP 2008211189 A JP2008211189 A JP 2008211189A JP 2008012240 A JP2008012240 A JP 2008012240A JP 2008012240 A JP2008012240 A JP 2008012240A JP 2008211189 A JP2008211189 A JP 2008211189A
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- Prior art keywords
- protrusion
- main surface
- semiconductor
- copper plate
- metal plate
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
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Abstract
【解決手段】表面Sに半導体素子2の電極2aとパターン部7bとを設けた半導体基板1を用意する。第1の主面S1とその反対側の第2の主面S2を有し、第1の主面S1に設けた突起部4aと第2の主面S2に設けた溝部4bとを備える銅板4xを形成する。パターン部7aとこれに対応する溝部4bが所定の位置関係になるように銅板4xの位置を調整することで突起部4aと電極2aとの位置合わせを行い、銅板4xの第1の主面S1側と半導体基板1とを絶縁層8を介して圧着し、突起部4aが絶縁層8を貫通した状態で突起部4aと電極2aとを電気的に接続する。第2の主面S2側に所定パターンの再配線パターン4を形成する。
【選択図】図5
Description
図1は本実施形態に係る半導体モジュールの概略断面図である。図1に基づいて本実施形態の半導体モジュールについて説明する。
図2および図3は突起部と溝部とを有する銅板の形成方法を説明するための概略断面図である。図4は複数のスクライブラインにより区画された半導体基板がマトリクス状に配置された半導体ウエハを示す平面図(上面図)である。図5および図6は図1に示した本実施形態に係る半導体モジュールの製造プロセスを説明するための概略断面図である。次に、図1〜図6を参照して本実施形態に係る半導体モジュールの製造プロセスについて説明する。
基板1の電極2aとの位置合わせ(重ね合わせ)を行い、半導体基板1(表面S側)と、突起部4aが形成された銅板4x(第1の主面S1側)との間に絶縁層8を挟持する。絶縁層8の厚さは、突起部4aの高さと同程度の約35μmである。なお、銅板4xと半導体基板1との位置合わせ方法については後述する。
導体ウエハ(半導体基板1)に絶縁層8を介して圧着する。この際、突起部4aが絶縁層8を貫通することにより突起部4aと半導体基板1の電極2aとが電気的に接続される。なお、位置合わせを行った後、別の装置にて圧着処理を行ってもよい。
上述の実施形態1では、銅板4zにおける半導体基板1の各電極2aに対応した位置に突起部4aを形成したが、本実施形態では銅板4xと半導体基板1のそれぞれの線膨張係数の差異と、銅板4xと半導体基板1の圧着時の加熱温度と、加熱にともなう膨張によって移動しない銅板4xの基準点からの距離とを考慮した位置に突起部4aを形成した点が実施形態1と異なる。以下、本実施形態について説明する。なお、実施形態1と同様の構成、方法については、同一の符号を付し、その説明は省略する。
次に、本発明の各実施形態に係る半導体モジュールを備えた携帯機器について説明する。なお、携帯機器として携帯電話に搭載する例を示すが、たとえば、個人用携帯情報端末(PDA)、デジタルビデオカメラ(DVC)、及びデジタルスチルカメラ(DSC)といった電子機器であってもよい。
Claims (8)
- 表面に半導体素子と、この半導体素子と電気的に接続された電極と、所定の第1のパターン部とが設けられた基板を用意する第1の工程と、
第1の主面およびその反対側の第2の主面を有し、前記第1の主面から突出して設けられた突起部と前記第2の主面に設けられた所定パターンの溝部とを備える金属板を用意する第2の工程と、
前記第1のパターン部とこれに対応する溝部が所定の位置関係になるように金属板の位置を調整することで前記突起部と前記電極との位置合わせを行い、前記金属板の前記第1の主面側と前記基板とを絶縁層を介して圧着し、前記突起部が前記絶縁層を貫通した状態で前記突起部と前記電極とを電気的に接続する第3の工程と、
前記金属板の前記第2の主面側に所定パターンの配線層を形成する第4の工程と、
を備えることを特徴とする半導体モジュールの製造方法。 - 前記第4の工程は、前記金属板の前記第2の主面側をエッチバックして前記溝部の底部を前記第1の主面まで貫通させることにより前記金属板を所定パターンの配線層に加工していることを特徴とする請求項1に記載の半導体モジュールの製造方法。
- 前記第4の工程は、前記配線層の側面と、前記配線層の前記絶縁層と反対側の主面との間の領域が面取り形状となるように、前記金属板を加工していることを特徴とする請求項2に記載の半導体モジュールの製造方法。
- 前記第2の工程は、平板状の金属板の一方の面に前記突起部を形成する第1のステップと、前記突起部の所定の第2のパターン部を基準として前記平板状の金属板の他方の面に前記溝部を形成する第2のステップと、を備えていることを特徴とする請求項1に記載の半導体モジュールの製造方法。
- 前記半導体素子は前記基板に複数形成され、
前記溝部は複数の前記半導体素子間を区画するように設けられたスクライブ領域にさらに形成されていることを特徴とする請求項1に記載の半導体モジュールの製造方法。 - 前記第3の工程は、前記金属板の前記第1の主面側と前記基板とを加熱しながら圧着し、
前記第1のステップは、前記金属板の線膨張係数と前記基板の線膨張係数との差と、前記第3の工程における加熱温度と、前記第3の工程における加熱にともなう膨張によって移動しない前記金属板の基準点からの距離とに応じて、前記電極に対向する位置から前記金属板の膨張方向とは反対側にずらした位置に、前記突起部を形成していることを特徴とする請求項4に記載の半導体モジュールの製造方法。 - 突起部が設けられた配線層と、
表面に半導体素子と、この半導体素子と電気的に接続されるとともに前記突起部に対応するように配置された電極とが設けられた基板と、
前記配線層と前記基板との間に設けられた絶縁層と、
を備え、
前記突起部が前記絶縁層を貫通した状態で前記突起部と前記電極とが電気的に接続され、
前記配線層の側面と、前記配線層の前記絶縁層と反対側の主面との間の領域が面取り形状であることを特徴とする半導体モジュール。 - 請求項7に記載の半導体モジュールを搭載したことを特徴とする携帯機器。
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JP2010262992A (ja) * | 2009-04-30 | 2010-11-18 | Sanyo Electric Co Ltd | 半導体モジュールおよび携帯機器 |
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US9082832B2 (en) * | 2011-09-21 | 2015-07-14 | Stats Chippac, Ltd. | Semiconductor device and method of forming protection and support structure for conductive interconnect structure |
US9484259B2 (en) | 2011-09-21 | 2016-11-01 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of forming protection and support structure for conductive interconnect structure |
US8664039B2 (en) * | 2011-10-18 | 2014-03-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods and apparatus for alignment in flip chip bonding |
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