CN110164839B - 一种高密度线路嵌入转移的扇出型封装结构与方法 - Google Patents
一种高密度线路嵌入转移的扇出型封装结构与方法 Download PDFInfo
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- CN110164839B CN110164839B CN201910446516.1A CN201910446516A CN110164839B CN 110164839 B CN110164839 B CN 110164839B CN 201910446516 A CN201910446516 A CN 201910446516A CN 110164839 B CN110164839 B CN 110164839B
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- 238000004806 packaging method and process Methods 0.000 title claims description 28
- 238000000034 method Methods 0.000 title claims description 23
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 54
- 229910052802 copper Inorganic materials 0.000 claims abstract description 54
- 239000010949 copper Substances 0.000 claims abstract description 54
- 238000009713 electroplating Methods 0.000 claims abstract description 9
- 238000011049 filling Methods 0.000 claims abstract description 7
- 238000005553 drilling Methods 0.000 claims abstract description 6
- 230000000149 penetrating effect Effects 0.000 claims abstract description 3
- 239000010410 layer Substances 0.000 claims description 135
- 239000011247 coating layer Substances 0.000 claims description 15
- 239000003292 glue Substances 0.000 claims description 15
- 238000007731 hot pressing Methods 0.000 claims description 11
- 238000004519 manufacturing process Methods 0.000 claims description 11
- 229920002120 photoresistant polymer Polymers 0.000 claims description 11
- 238000000137 annealing Methods 0.000 claims description 10
- 229910000679 solder Inorganic materials 0.000 claims description 8
- 238000012546 transfer Methods 0.000 claims description 8
- 238000013461 design Methods 0.000 claims description 7
- 238000007747 plating Methods 0.000 claims description 7
- 238000002360 preparation method Methods 0.000 claims description 5
- 238000004544 sputter deposition Methods 0.000 claims description 5
- 238000005406 washing Methods 0.000 claims description 5
- 238000005260 corrosion Methods 0.000 claims description 4
- 230000007797 corrosion Effects 0.000 claims description 4
- 230000008018 melting Effects 0.000 claims description 4
- 238000002844 melting Methods 0.000 claims description 4
- 239000000126 substance Substances 0.000 claims description 4
- 239000000853 adhesive Substances 0.000 claims description 3
- 230000001070 adhesive effect Effects 0.000 claims description 3
- 239000003989 dielectric material Substances 0.000 claims description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 2
- 239000010931 gold Substances 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 230000007704 transition Effects 0.000 claims 4
- 239000000758 substrate Substances 0.000 description 7
- 239000004973 liquid crystal related substance Substances 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 238000011417 postcuring Methods 0.000 description 4
- 238000011161 development Methods 0.000 description 3
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- 238000007711 solidification Methods 0.000 description 2
- 230000008023 solidification Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000001746 injection moulding Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/568—Temporary substrate used as encapsulation process aid
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
Abstract
Description
Claims (6)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910446516.1A CN110164839B (zh) | 2019-05-27 | 2019-05-27 | 一种高密度线路嵌入转移的扇出型封装结构与方法 |
PCT/CN2020/092384 WO2020238914A1 (zh) | 2019-05-27 | 2020-05-26 | 一种高密度线路嵌入转移的扇出型封装结构及其制作方法 |
Applications Claiming Priority (1)
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CN201910446516.1A CN110164839B (zh) | 2019-05-27 | 2019-05-27 | 一种高密度线路嵌入转移的扇出型封装结构与方法 |
Publications (2)
Publication Number | Publication Date |
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CN110164839A CN110164839A (zh) | 2019-08-23 |
CN110164839B true CN110164839B (zh) | 2020-01-31 |
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CN201910446516.1A Active CN110164839B (zh) | 2019-05-27 | 2019-05-27 | 一种高密度线路嵌入转移的扇出型封装结构与方法 |
Country Status (2)
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CN (1) | CN110164839B (zh) |
WO (1) | WO2020238914A1 (zh) |
Families Citing this family (4)
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CN110164839B (zh) * | 2019-05-27 | 2020-01-31 | 广东工业大学 | 一种高密度线路嵌入转移的扇出型封装结构与方法 |
CN113725086B (zh) * | 2020-03-27 | 2024-02-27 | 矽磐微电子(重庆)有限公司 | 芯片封装结构的制作方法 |
CN113725087B (zh) * | 2020-03-27 | 2024-02-27 | 矽磐微电子(重庆)有限公司 | 芯片封装结构的制作方法 |
CN111755350B (zh) * | 2020-05-26 | 2022-07-08 | 甬矽电子(宁波)股份有限公司 | 封装结构制作方法和封装结构 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4902558B2 (ja) * | 2007-01-31 | 2012-03-21 | 三洋電機株式会社 | 半導体モジュールの製造方法 |
US8659154B2 (en) * | 2008-03-14 | 2014-02-25 | Infineon Technologies Ag | Semiconductor device including adhesive covered element |
US8604600B2 (en) * | 2011-12-30 | 2013-12-10 | Deca Technologies Inc. | Fully molded fan-out |
US8623699B2 (en) * | 2010-07-26 | 2014-01-07 | General Electric Company | Method of chip package build-up |
CN102522366B (zh) * | 2011-11-25 | 2017-06-20 | 北京大学深圳研究生院 | 一种集成电路芯片重新布线的压印方法 |
CN202839599U (zh) * | 2012-08-23 | 2013-03-27 | 江阴长电先进封装有限公司 | 一种芯片嵌入式三维圆片级封装结构 |
US9721799B2 (en) * | 2014-11-07 | 2017-08-01 | Advanced Semiconductor Engineering, Inc. | Semiconductor package with reduced via hole width and reduced pad patch and manufacturing method thereof |
US9570406B2 (en) * | 2015-06-01 | 2017-02-14 | Qorvo Us, Inc. | Wafer level fan-out with electromagnetic shielding |
US20170243845A1 (en) * | 2016-02-19 | 2017-08-24 | Qualcomm Incorporated | Fan-out wafer-level packages with improved topology |
CN110661936B (zh) * | 2018-06-29 | 2024-04-16 | 宁波舜宇光电信息有限公司 | 线路板组件、感光组件、摄像模组及感光组件制作方法 |
CN110164839B (zh) * | 2019-05-27 | 2020-01-31 | 广东工业大学 | 一种高密度线路嵌入转移的扇出型封装结构与方法 |
-
2019
- 2019-05-27 CN CN201910446516.1A patent/CN110164839B/zh active Active
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2020
- 2020-05-26 WO PCT/CN2020/092384 patent/WO2020238914A1/zh active Application Filing
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Publication number | Publication date |
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WO2020238914A1 (zh) | 2020-12-03 |
CN110164839A (zh) | 2019-08-23 |
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