CN115424946A - 基于铜凸点Frame载板嵌入芯片的三维异构封装结构的制作方法 - Google Patents
基于铜凸点Frame载板嵌入芯片的三维异构封装结构的制作方法 Download PDFInfo
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Abstract
本发明公开了一种基于铜凸点Frame载板嵌入芯片的三维异构封装结构的制作方法,该方法首先在可分离铜箔临时载板上使用光刻电镀的工艺制作铜凸点,形成Frame结构,然后在Frame设计区域内贴不同的Bumping芯片,然后通过压覆介电材料,使介电材料覆盖Frame结构,再通过研磨介电料后露出铜凸点面;然后制作内层的布线层,并进行倒装贴装后包封芯片,移除临时基板后,就可以通过光刻、电镀、研磨工艺完成多层的外层布线制作。本发明在铜凸点Frame上直接嵌入Bumping芯片,形成三维结构的异质封装嵌入结构,此时封装结构已具备一定的厚度和刚性,移除临时基板后,结构可靠性更高。
Description
技术领域
本发明属于半导体三维异质封装的技术领域,具体涉及一种基于铜凸点Frame载板嵌入芯片的三维异构封装结构的制作方法。
背景技术
封装基板是可为芯片提供电连接、保护、支撑、散热、组装等功效,以实现多引脚化,缩小封装产品体积、改善电性能及散热性、超高密度或多芯片模块化的目的。目前所使用的多数是半导体封装基板。
封装技术经历了4个阶段:(1)20世纪70代,以插装型的封装技术形式为主;(2)20世纪80年代,主要以微电子封装技术表面贴装技术为主流;(3)20世纪90年代,随着集成电路技术的不断进步,封装技术主要是以面阵列的方式向小型化和低功率方向发展;(4)进入21世纪后,封装技术进入了快速发展时期,迎来了堆叠式封装技术时代,封装概念从原本的单一器件封装演变成了系统级封装(SiP)。
半导体三维异质封装主要是针对芯片的嵌入式封装,目前三种主要用于集成电路(IC)芯片封装的互连技术分别为:引线键合技术(Wire Bond,WB)、倒装芯片技术(FlipChip,FC)和硅通孔技术(Through Silicon Via,TSV)。由于现代微电子晶圆级加工能力的大幅度提升,晶圆级封装的布线能力亿达到微米量级。
现有的方案主要为EMIB方案,如图1所示,EMIB方案是:首先封装基板上挖洞,嵌埋入芯片,再通过镭射打孔外露嵌埋芯片的IO,然后再通过化铜和光刻镀铜工艺形成布线层,最外层再使用倒装工艺贴装外层芯片,同时需要单独制作互联载板,用于封装器件和PCB板链接。
在嵌埋芯片时,无法有效控制芯片位移状况,故仅能嵌埋一部分低引脚的器件(50个引脚以下),同时还需要单独制作互联载板(Interposer载板),整个封装架构里结构和工艺流程复杂,同时无法实现异质芯片的在二维层面的混合封装。
发明内容
为解决上述问题,本发明的首要目的在于提供一种基于铜凸点Frame载板嵌入芯片的三维异构封装结构的制作方法,该方法在铜凸点Frame上直接嵌入Bumping器件的三维异构封装的结构及其制作方法,使嵌埋层能够嵌入高引脚数(1000个引脚以上)的芯片,以及不同厚度的异质芯片,结构可靠性更高,同时取消了制作互联载板的步骤,缩减工艺流程。
为实现上述目的,本发明的技术方案如下。
一种基于铜凸点Frame载板嵌入芯片的三维异构封装结构的制作方法,该方法首先在可分离铜箔临时载板上使用光刻电镀的工艺制作铜凸点,形成Frame结构,然后在Frame设计区域内贴不同的Bumping芯片,然后通过压覆介电材料,使介电材料覆盖Frame结构,再通过研磨介电料后露出铜凸点面;然后制作内层的布线层,并进行倒装贴装后包封芯片,形成三维结构的异质封装嵌入结构,此时封装结构已具备一定的厚度和刚性,移除临时基板后,就可以通过光刻、电镀、研磨工艺完成多层的外层布线制作,形成最终结构。
具体包括以下步骤:
S1、准备临时基板,
基板可以包含有多层,其中一层为铜箔,其余为介电材料层,所述介电材料层为塑封料、PI、ABF;铜箔可分离,厚度为3μm;
可以直接使用玻璃附有铜箔作为临时基板。
S2、电镀铜凸点层;
在铜箔上电镀一层铜凸点Frame层,其中铜凸点高度为200±100μm;
S3、贴芯片;
所述芯片为异质Bumping芯片,且倒置贴附在铜凸点Frame层上,所述异质Bumping芯片位于铜凸点之间;
所述Bumping芯片为带铜凸点芯片。芯片的厚度可以不一样,但是通过芯片上铜凸点高度的控制,可以使得贴装后高度一致。
S4、填充介质材料;
用介电材料完全覆盖异质Bumping芯片及铜凸点Frame层,并使介电材料固化在异质Bumping芯片及铜凸点Frame层上;
S5、表面研磨,
露出异质Bumping芯片的铜凸点及铜凸点Frame层的铜凸点;
S6、内层布线;
将内层的布线设置在异质Bumping芯片及铜凸点Frame层上,并使异质Bumping芯片的铜凸点及铜凸点Frame层的铜凸点与布线连接;
S7、倒装芯片;
在内层布线上装设芯片,芯片的铜凸点只需要与内层布线连接即可。
S8、包封芯片;
采用介电材料将芯片进行封装;
S9、移除临时基板;
将临时基板从铜凸点Frame层剥离,所述铜箔及介电材料层均需进行剥离。
S10、外层布线。
在铜凸点Frame层上制作外层布线。
本发明的有益效果是:
本发明在铜凸点Frame上直接嵌入Bumping芯片,使嵌埋层能够嵌入高引脚数的芯片以及不同厚度的异质芯片,然后制作内层的布线层,并进行倒装贴装后包封芯片,形成三维结构的异质封装嵌入结构,此时封装结构已具备一定的厚度和刚性,移除临时基板后,结构可靠性更高。
同时取消了制作互联载板的步骤,简化了工艺步骤,缩减工艺流程。
附图说明
图1是现有技术制作的高密度封装基板示意图。
图2是本发明所实现Frame框架载板的示意图。
图3是本发明所实现倒贴异质Bumping芯片的示意图。
图4是本发明所实现填充介电材料的示意图。
图5是本发明所实现表面研磨的示意图。
图6是本发明所实现内层布线示意图。
图7是本发明所实现倒装芯片示意图。
图8是本发明所实现包封芯片示意图。
图9是本发明所实现移除临时基板示意图。
图10是本发明所实现外层布线示意图。
具体实施方式
为了使本发明的目的、技术方案及优点更加清楚明白,以下结合附图及实施例,对本发明进行进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。
本发明所实现的该方法首先在可分离铜箔临时载板上使用光刻电镀的工艺制作铜凸点,形成Frame结构,然后在Frame设计区域内贴不同的Bumping芯片,然后通过压覆介电材料,使介电材料覆盖Frame结构,再通过研磨介电料后露出铜凸点面;然后制作内层的布线层,并进行倒装贴装后包封芯片,形成三维结构的异质封装嵌入结构,此时封装结构已具备一定的厚度和刚性,移除临时基板后,就可以通过光刻、电镀、研磨工艺完成多层的外层布线制作,形成最终结构。
具体地说,该方法包括以下步骤:
S1、准备临时基板,其中,基板可以包含有多层,但是至少一层为铜箔2,其余为介电材料层3,所述介电材料层可以为塑封料、PI、ABF的任意一种;铜箔可分离,厚度为3μm。
也可以直接使用玻璃附有铜箔作为临时基板。
S2、电镀铜凸点层;如图2所示。
铜箔2下方为介电材料层3,在铜箔2上电镀一层铜凸点Frame层1,铜凸点Frame层1中具有若干个铜凸点4,其中铜凸点4高度为200±100μm;采用高深宽比的铜柱结构作为Frame框架载板,能够很好地容纳异质Bumping芯片。
S3、贴芯片;如图3所示。
所述芯片为异质Bumping芯片5,带有铜凸点51,以实现连接;将异质Bumping芯片5倒置贴附在铜凸点Frame层1上,且所述异质Bumping芯片5位于铜凸点Frame层1的铜凸点4之间;
所述Bumping芯片5为带铜凸点芯片。芯片的厚度可以不一样,但是通过芯片上铜凸点51高度的控制,可以使得贴装后高度一致。
S4、填充介质材料;
用介电材料6完全覆盖异质Bumping芯片5及铜凸点Frame层1,并使介电材料6固化在异质Bumping芯片5及铜凸点Frame层1上,这样介电材料6包覆异质Bumping芯片5及铜凸点Frame层1的铜凸点4;如图4所示。
S5、表面研磨,为了使表面保持一致,并露出铜凸点,需对介电材料进行研磨,露出异质Bumping芯片5的铜凸点51及铜凸点Frame层1的铜凸点4;如图5所示。
S6、内层布线;如图6所示。
内层布线即在铜凸点Frame层1的内侧再设置一层布线层8,布线层8内具有布线7;布线层8为介电材料,可以采用与介电材料6相同的材料,也可以采用不同的材料,通常是采用相同的材料;将内层布线设置在异质Bumping芯片5及铜凸点Frame层1上,并使异质Bumping芯片1的铜凸点4及铜凸点Frame层1的铜凸点51与布线7连接。
其中,布线7暴露在外,以便于连接芯片9。
S7、倒装芯片;
在内层布线层8上装设芯片9,芯片9依据需要进行选择,芯片9通过导电胶10与布线7连接即可,如图7所示。
S8、包封芯片;
采用介电材料11将芯片9进行封装,完全覆盖芯片9;如图8所示。
S9、移除临时基板;如图9所示。
将临时基板从铜凸点Frame层剥离,所述铜箔及介电材料层均需进行剥离。通常采用机械剥离,由于铜箔2是可剥离的,因此便于进行机械剥离。
S10、外层布线。
在铜凸点Frame层上制作外层布线,如图10所示,外层布线为现有技术,在此不再赘述。
本发明在铜凸点Frame上直接嵌入Bumping芯片,使嵌埋层能够嵌入高引脚数的芯片以及不同厚度的异质芯片,然后制作内层的布线层,并进行倒装贴装后包封芯片,形成三维结构的异质封装嵌入结构,此时封装结构已具备一定的厚度和刚性,移除临时基板后,结构可靠性更高。
本发明的优点在于:
1.使用高深宽比的铜柱结构作为Frame框架载板,嵌入带Bumping芯片,代替了多层盲孔的制作工艺,可靠性更高;
2.本结构整合了异质Bumping芯片,符合高引脚芯片的嵌入要求;
3.省去了单独制作互联载板以及贴装工艺,
4.不同厚度的异质芯片,通过芯片上铜凸点高度调整,可以实现同层异质封装。
以上仅为本发明的较佳实施例而已,并不用以限制本发明,凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等,均应包含在本发明的保护范围之内。
Claims (8)
1.一种基于铜凸点Frame载板嵌入芯片的三维异构封装结构的制作方法,其特征在于该方法首先在可分离铜箔临时载板上使用光刻电镀的工艺制作铜凸点,形成Frame结构,然后在Frame设计区域内贴不同的Bumping芯片,然后通过压覆介电材料,使介电材料覆盖Frame结构,再通过研磨介电料后露出铜凸点面;然后制作内层的布线层,并进行倒装贴装后包封芯片,形成三维结构的异质封装嵌入结构,此时封装结构已具备一定的厚度和刚性,移除临时基板后,就可以通过光刻、电镀、研磨工艺完成多层的外层布线制作,形成最终结构。
2.如权利要求2所述的基于铜凸点Frame载板嵌入芯片的三维异构封装结构的制作方法,其特征在于包括以下步骤:
S1、准备临时基板,
S2、电镀铜凸点层;
在铜箔上电镀一层铜凸点Frame层;
S3、贴芯片;
所述芯片为带铜凸点Bumping芯片;
S4、填充介质材料;
用介电材料完全覆盖异质Bumping芯片及铜凸点Frame层,并使介电材料固化在异质Bumping芯片及铜凸点Frame层上;
S5、表面研磨,对介电材料进行研磨,露出异质Bumping芯片的铜凸点及铜凸点Frame层的铜凸点;
S6、内层布线;
将内层的布线设置在异质Bumping芯片及铜凸点Frame层上,并使异质Bumping芯片的铜凸点及铜凸点Frame层的铜凸点与布线连接;
S7、倒装芯片;
S8、包封芯片;
采用介电材料将芯片进行封装;
S9、移除临时基板;
将临时基板从铜凸点Frame层剥离,所述铜箔及介电材料层均需进行剥离。
S10、外层布线。
3.如权利要求2所述的基于铜凸点Frame载板嵌入芯片的三维异构封装结构的制作方法,其特征在于S1步骤中,基板可以包含有多层,其中一层为铜箔,其余为介电材料层,所述介电材料层为塑封料、PI、ABF。
4.如权利要求3所述的基于铜凸点Frame载板嵌入芯片的三维异构封装结构的制作方法,其特征在于S1步骤中,铜箔可分离,厚度约为3μm。
5.如权利要求2所述的基于铜凸点Frame载板嵌入芯片的三维异构封装结构的制作方法,其特征在于S1步骤中,可以直接使用玻璃附有铜箔作为临时基板。
6.如权利要求2所述的基于铜凸点Frame载板嵌入芯片的三维异构封装结构的制作方法,其特征在于S2步骤中,铜凸点高度为200±100μm。
7.如权利要求2所述的基于铜凸点Frame载板嵌入芯片的三维异构封装结构的制作方法,其特征在于S3步骤中,所述Bumping芯片为异质Bumping芯片,且倒置贴附在铜凸点Frame层上,所述异质Bumping芯片位于铜凸点之间。
8.如权利要求2所述的基于铜凸点Frame载板嵌入芯片的三维异构封装结构的制作方法,其特征在于S7步骤中,在内层布线上装设芯片,芯片的铜凸点只需要与内层布线连接即可。
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