JP4833319B2 - 電磁波遮蔽機能を有する半導体パッケージの製造方法 - Google Patents
電磁波遮蔽機能を有する半導体パッケージの製造方法 Download PDFInfo
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Description
11 電磁波遮蔽膜
13 モールド
14 チップ
15 プリント回路基板
20 QFNパッケージ
21 電磁波遮蔽膜
28 接地部
29 リード
29E 接地端子
50 冶具
51 冶具孔
53 コーティング溝
Claims (5)
- ウェーハ上のチップを分離するためにウェーハを切断するウェーハソーイング工程と、
表面実装部品(SMC)を電子回路に取り付ける部品表面実装工程と、
前記チップを基板に貼り付けるダイボンディング工程と、
前記チップ上のボンディングパッドとリードフレームをワイヤーにより貼り合わせるワイヤーボンディング工程と、
前記チップと前記ワイヤーを合成樹脂により封止してモールドを形成するモールディング工程と、
前記モールドの表面のうち電磁波遮蔽膜をコーティングする必要がない領域を、接地端子に対応する溝が凹設され、かつ、前記モールドの上面を露出させる冶具で遮断するマスキング工程と、
前記マスキング工程後に、前記モールドの上面及び前記接地端子に対応する側面にプラズマスパッタリング装置を用いてニッケルと銀またはニッケルと銅からなるターゲット金属をコーティングして電磁波遮蔽膜を成膜するスパッタリング工程と、
前記電磁波遮蔽膜が成膜された半導体パッケージの各々を互いに分離可能に前記基板を切断するシンギュレーション工程と、
を含むことを特徴とする、電磁波遮蔽機能を有する半導体パッケージの製造方法。 - 前記スパッタリング工程においては、ニッケル10〜90重量%と銀10〜90重量%の合金またはニッケル10〜90重量%と銅10〜90重量%の合金をターゲット金属として使用し、真空度が2.0〜3.0×10−3Torrのスパッタリングチャンバーに100〜150sccmの反応ガスを注入して20〜30分間スパッタリングを行うことを特徴とする、請求項1に記載の電磁波遮蔽機能を有する半導体パッケージの製造方法。
- 前記スパッタリング工程において、前記モールドの表面に、ニッケルと銀またはニッケルと銅合金からなり、且つ、厚さが4000〜8000Åの電磁波遮蔽膜がコーティングされる、請求項1または2に記載の電磁波遮蔽機能を有する半導体パッケージの製造方法。
- 前記マスキング工程で、前記モールドは、前記冶具が有する、端面が上に進むにつれて広くなる上広下狭の、冶具孔に嵌入される請求項1から3のいずれか一項に記載の電磁波遮蔽機能を有する半導体パッケージの製造方法。
- 前記冶具は、前記半導体パッケージに対応する複数の前記冶具孔を有し、
前記スパッタリング工程で、複数の前記冶具孔で前記モールドの上面に前記電磁波遮蔽膜が形成され、
前記スパッタリング工程の後に、前記シンギュレーション工程が行われる
請求項4に記載の電磁波遮蔽機能を有する半導体パッケージの製造方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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KR10-2008-0050975 | 2008-05-30 | ||
KR1020080050975A KR100877551B1 (ko) | 2008-05-30 | 2008-05-30 | 전자파 차폐 기능을 갖는 반도체 패키지, 그 제조방법 및 지그 |
Publications (2)
Publication Number | Publication Date |
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JP2009290217A JP2009290217A (ja) | 2009-12-10 |
JP4833319B2 true JP4833319B2 (ja) | 2011-12-07 |
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JP2009131525A Expired - Fee Related JP4833319B2 (ja) | 2008-05-30 | 2009-05-29 | 電磁波遮蔽機能を有する半導体パッケージの製造方法 |
Country Status (5)
Country | Link |
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US (1) | US7964938B2 (ja) |
EP (2) | EP2270842A3 (ja) |
JP (1) | JP4833319B2 (ja) |
KR (1) | KR100877551B1 (ja) |
TW (1) | TW201003882A (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10396039B2 (en) | 2014-12-09 | 2019-08-27 | Mitsubishi Electric Corporation | Semiconductor package |
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JP4985185B2 (ja) * | 2007-07-27 | 2012-07-25 | 富士ゼロックス株式会社 | 記録材切断装置及びこれを用いた記録材切断処理装置 |
KR101046254B1 (ko) | 2010-02-05 | 2011-07-04 | 앰코 테크놀로지 코리아 주식회사 | 전자파 차폐 수단을 갖는 반도체 패키지 및 그 제조 방법 |
TWI404187B (zh) * | 2010-02-12 | 2013-08-01 | 矽品精密工業股份有限公司 | 能避免電磁干擾之四方形扁平無引腳封裝結構及其製法 |
WO2012016898A2 (de) | 2010-08-05 | 2012-02-09 | Epcos Ag | Verfahren zur herstellung einer mehrzahl von elektronischen bauelementen mit elektromagnetischer schirmung und insbesondere mit wärmeabführung und elektronisches bauelement mit elektromagnetischer schirmung und insbesondere mit wärmeabführung |
US8084300B1 (en) * | 2010-11-24 | 2011-12-27 | Unisem (Mauritius) Holdings Limited | RF shielding for a singulated laminate semiconductor device package |
JP5480923B2 (ja) | 2011-05-13 | 2014-04-23 | シャープ株式会社 | 半導体モジュールの製造方法及び半導体モジュール |
KR101862370B1 (ko) | 2011-05-30 | 2018-05-29 | 삼성전자주식회사 | 반도체 소자, 반도체 패키지 및 전자 장치 |
KR101250677B1 (ko) | 2011-09-30 | 2013-04-03 | 삼성전기주식회사 | 반도체 패키지 및 그의 제조 방법 |
CN103576602A (zh) * | 2012-07-31 | 2014-02-12 | 昆山福冈电子有限公司 | Emi专用真空溅镀治具制作工艺 |
TWI497680B (zh) * | 2013-03-01 | 2015-08-21 | Advanced Semiconductor Eng | 半導體封裝結構與其製造方法 |
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- 2008-05-30 KR KR1020080050975A patent/KR100877551B1/ko active IP Right Grant
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- 2009-05-27 TW TW098117760A patent/TW201003882A/zh unknown
- 2009-05-29 US US12/474,375 patent/US7964938B2/en not_active Expired - Fee Related
- 2009-05-29 EP EP10075644A patent/EP2270842A3/en not_active Withdrawn
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US10396039B2 (en) | 2014-12-09 | 2019-08-27 | Mitsubishi Electric Corporation | Semiconductor package |
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JP2009290217A (ja) | 2009-12-10 |
US7964938B2 (en) | 2011-06-21 |
TW201003882A (en) | 2010-01-16 |
EP2270842A3 (en) | 2011-04-27 |
US20090294930A1 (en) | 2009-12-03 |
EP2133916A2 (en) | 2009-12-16 |
EP2270842A2 (en) | 2011-01-05 |
EP2133916A3 (en) | 2010-03-03 |
KR100877551B1 (ko) | 2009-01-07 |
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