JP4651359B2 - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
- Publication number
- JP4651359B2 JP4651359B2 JP2004315998A JP2004315998A JP4651359B2 JP 4651359 B2 JP4651359 B2 JP 4651359B2 JP 2004315998 A JP2004315998 A JP 2004315998A JP 2004315998 A JP2004315998 A JP 2004315998A JP 4651359 B2 JP4651359 B2 JP 4651359B2
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- JP
- Japan
- Prior art keywords
- semiconductor chip
- semiconductor device
- solder resist
- wiring board
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
- H10W76/10—Containers or parts thereof
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/63—Vias, e.g. via plugs
- H10W70/635—Through-vias
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/65—Shapes or dispositions of interconnections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/65—Shapes or dispositions of interconnections
- H10W70/654—Top-view layouts
- H10W70/656—Fan-in layouts
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/0198—Manufacture or treatment batch processes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/0711—Apparatus therefor
- H10W72/07141—Means for applying energy, e.g. ovens or lasers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
- H10W72/07351—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting
- H10W72/07352—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting changes in structures or sizes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07511—Treating the bonding area before connecting, e.g. by applying flux or cleaning
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07521—Aligning
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/321—Structures or relative sizes of die-attach connectors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5434—Dispositions of bond wires the connected ends being on auxiliary connecting means on bond pads, e.g. on other bond wires
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/551—Materials of bond wires
- H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
- H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/931—Shapes of bond pads
- H10W72/932—Plan-view shape, i.e. in top view
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/20—Configurations of stacked chips
- H10W90/291—Configurations of stacked chips characterised by containers, encapsulations, or other housings for the stacked chips
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/20—Configurations of stacked chips
- H10W90/297—Configurations of stacked chips characterised by the through-semiconductor vias [TSVs] in the stacked chips
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/752—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004315998A JP4651359B2 (ja) | 2004-10-29 | 2004-10-29 | 半導体装置およびその製造方法 |
| TW094135613A TWI374527B (en) | 2004-10-29 | 2005-10-13 | A semiconductor device and a method for manufacturing of the same |
| CNB200510117027XA CN100479135C (zh) | 2004-10-29 | 2005-10-28 | 半导体器件及其制造方法 |
| US11/260,084 US7518250B2 (en) | 2004-10-29 | 2005-10-28 | Semiconductor device and a method for manufacturing of the same |
| KR1020050102451A KR101117848B1 (ko) | 2004-10-29 | 2005-10-28 | 반도체 장치 및 그 제조 방법 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004315998A JP4651359B2 (ja) | 2004-10-29 | 2004-10-29 | 半導体装置およびその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2006128455A JP2006128455A (ja) | 2006-05-18 |
| JP2006128455A5 JP2006128455A5 (https=) | 2007-12-13 |
| JP4651359B2 true JP4651359B2 (ja) | 2011-03-16 |
Family
ID=36260867
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2004315998A Expired - Fee Related JP4651359B2 (ja) | 2004-10-29 | 2004-10-29 | 半導体装置およびその製造方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US7518250B2 (https=) |
| JP (1) | JP4651359B2 (https=) |
| KR (1) | KR101117848B1 (https=) |
| CN (1) | CN100479135C (https=) |
| TW (1) | TWI374527B (https=) |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| SG121707A1 (en) | 2002-03-04 | 2006-05-26 | Micron Technology Inc | Method and apparatus for flip-chip packaging providing testing capability |
| SG111935A1 (en) * | 2002-03-04 | 2005-06-29 | Micron Technology Inc | Interposer configured to reduce the profiles of semiconductor device assemblies and packages including the same and methods |
| JP2007335581A (ja) | 2006-06-14 | 2007-12-27 | Renesas Technology Corp | 半導体装置の製造方法 |
| EP2272794A1 (en) * | 2006-07-14 | 2011-01-12 | STMicroelectronics S.r.l. | Semiconductor package substrate, in particular for MEMS devices |
| KR100766503B1 (ko) * | 2006-09-20 | 2007-10-15 | 삼성전자주식회사 | 반도체 소자 패키지 |
| JP2008078367A (ja) * | 2006-09-21 | 2008-04-03 | Renesas Technology Corp | 半導体装置 |
| JP5511125B2 (ja) * | 2006-12-27 | 2014-06-04 | キヤノン株式会社 | 半導体モジュール及びその製造方法 |
| KR20090041756A (ko) * | 2007-10-24 | 2009-04-29 | 삼성전자주식회사 | 접착층을 갖는 프린트 배선 기판 및 이를 이용한 반도체패키지 |
| JP2009194079A (ja) * | 2008-02-13 | 2009-08-27 | Panasonic Corp | 半導体装置用配線基板とその製造方法及びそれを用いた半導体装置 |
| KR101351188B1 (ko) * | 2008-02-29 | 2014-01-14 | 삼성테크윈 주식회사 | 볼 그리드 어레이 패키지용 인쇄회로기판 및 그 제조 방법 |
| JP2010165923A (ja) * | 2009-01-16 | 2010-07-29 | Renesas Electronics Corp | 半導体装置、及びその製造方法 |
| JP2010238693A (ja) * | 2009-03-30 | 2010-10-21 | Toppan Printing Co Ltd | 半導体素子用基板の製造方法および半導体装置 |
| WO2010112983A1 (en) * | 2009-03-31 | 2010-10-07 | Stmicroelectronics (Grenoble 2) Sas | Wire-bonded semiconductor package with a coated wire |
| JP2011077108A (ja) * | 2009-09-29 | 2011-04-14 | Elpida Memory Inc | 半導体装置 |
| US8536718B2 (en) * | 2010-06-24 | 2013-09-17 | Stats Chippac Ltd. | Integrated circuit packaging system with trenches and method of manufacture thereof |
| JP2012084840A (ja) | 2010-09-13 | 2012-04-26 | Renesas Electronics Corp | 半導体装置及びその製造方法 |
| KR101594817B1 (ko) * | 2011-10-31 | 2016-02-17 | 가부시키가이샤 무라타 세이사쿠쇼 | 전자부품, 집합 기판 및 전자부품의 제조방법 |
| JP2015220235A (ja) * | 2014-05-14 | 2015-12-07 | マイクロン テクノロジー, インク. | 半導体装置 |
| WO2017040967A1 (en) * | 2015-09-04 | 2017-03-09 | Octavo Systems Llc | Improved system using system in package components |
| KR101815754B1 (ko) * | 2016-03-10 | 2018-01-08 | 앰코 테크놀로지 코리아 주식회사 | 반도체 디바이스 |
| JP6776280B2 (ja) * | 2018-01-10 | 2020-10-28 | 株式会社東芝 | 無線通信モジュール、プリント基板、および製造方法 |
| US10879160B2 (en) * | 2018-02-01 | 2020-12-29 | SK Hynix Inc. | Semiconductor package with packaging substrate |
| CN110112117A (zh) * | 2018-02-01 | 2019-08-09 | 爱思开海力士有限公司 | 半导体封装 |
| JP2020047664A (ja) * | 2018-09-14 | 2020-03-26 | キオクシア株式会社 | 半導体装置および半導体装置の作製方法 |
| CN109650323B (zh) * | 2018-12-24 | 2020-11-03 | 烟台艾睿光电科技有限公司 | 一种焊料隔离结构以及电子器件 |
| KR102883708B1 (ko) | 2020-07-16 | 2025-11-10 | 삼성전자주식회사 | 반도체 패키지 |
| US12494419B2 (en) * | 2021-08-11 | 2025-12-09 | Stmicroelectronics (Malta) Ltd. | Integrated circuit package with warpage control using cavity formed in laminated substrate below the integrated circuit die |
| US11729915B1 (en) | 2022-03-22 | 2023-08-15 | Tactotek Oy | Method for manufacturing a number of electrical nodes, electrical node module, electrical node, and multilayer structure |
| TW202518660A (zh) * | 2023-10-17 | 2025-05-01 | 矽品精密工業股份有限公司 | 晶片承載結構 |
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| JP2003273287A (ja) * | 2002-03-15 | 2003-09-26 | Mitsubishi Electric Corp | 半導体装置 |
| US20050194698A1 (en) * | 2004-03-03 | 2005-09-08 | St Assembly Test Service Ltd. | Integrated circuit package with keep-out zone overlapping undercut zone |
| US7459795B2 (en) * | 2004-08-19 | 2008-12-02 | Formfactor, Inc. | Method to build a wirebond probe card in a many at a time fashion |
-
2004
- 2004-10-29 JP JP2004315998A patent/JP4651359B2/ja not_active Expired - Fee Related
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2005
- 2005-10-13 TW TW094135613A patent/TWI374527B/zh not_active IP Right Cessation
- 2005-10-28 KR KR1020050102451A patent/KR101117848B1/ko not_active Expired - Fee Related
- 2005-10-28 US US11/260,084 patent/US7518250B2/en not_active Expired - Fee Related
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Also Published As
| Publication number | Publication date |
|---|---|
| TW200629509A (en) | 2006-08-16 |
| CN1779951A (zh) | 2006-05-31 |
| KR20060052333A (ko) | 2006-05-19 |
| US20060091523A1 (en) | 2006-05-04 |
| KR101117848B1 (ko) | 2012-03-15 |
| CN100479135C (zh) | 2009-04-15 |
| TWI374527B (en) | 2012-10-11 |
| JP2006128455A (ja) | 2006-05-18 |
| US7518250B2 (en) | 2009-04-14 |
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