JP4553410B2 - 新しい浅いトレンチ分離技術 - Google Patents
新しい浅いトレンチ分離技術 Download PDFInfo
- Publication number
- JP4553410B2 JP4553410B2 JP51505097A JP51505097A JP4553410B2 JP 4553410 B2 JP4553410 B2 JP 4553410B2 JP 51505097 A JP51505097 A JP 51505097A JP 51505097 A JP51505097 A JP 51505097A JP 4553410 B2 JP4553410 B2 JP 4553410B2
- Authority
- JP
- Japan
- Prior art keywords
- trench
- oxide layer
- silicon substrate
- layer
- silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
- H01L21/76235—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls trench shape altered by a local oxidation of silicon process step, e.g. trench corner rounding by LOCOS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76221—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO with a plurality of successive local oxidation steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/05—Etch and refill
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/536,694 US5719085A (en) | 1995-09-29 | 1995-09-29 | Shallow trench isolation technique |
| US08/536,694 | 1995-09-29 | ||
| PCT/US1996/015281 WO1997014175A2 (en) | 1995-09-29 | 1996-09-23 | Novel shallow trench isolation technique |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPH11513538A JPH11513538A (ja) | 1999-11-16 |
| JPH11513538A5 JPH11513538A5 (enExample) | 2004-09-02 |
| JP4553410B2 true JP4553410B2 (ja) | 2010-09-29 |
Family
ID=24139539
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP51505097A Expired - Fee Related JP4553410B2 (ja) | 1995-09-29 | 1996-09-23 | 新しい浅いトレンチ分離技術 |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US5719085A (enExample) |
| EP (1) | EP0856197B1 (enExample) |
| JP (1) | JP4553410B2 (enExample) |
| KR (1) | KR100316221B1 (enExample) |
| AU (1) | AU7370296A (enExample) |
| DE (1) | DE69638085D1 (enExample) |
| IL (1) | IL123750A (enExample) |
| TW (1) | TW353215B (enExample) |
| WO (1) | WO1997014175A2 (enExample) |
Families Citing this family (310)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
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| US5933746A (en) * | 1996-04-23 | 1999-08-03 | Harris Corporation | Process of forming trench isolation device |
| JP4195734B2 (ja) * | 1996-06-10 | 2008-12-10 | テキサス インスツルメンツ インコーポレイテツド | 集積回路のトレンチ分離製作方法 |
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| US6114741A (en) * | 1996-12-13 | 2000-09-05 | Texas Instruments Incorporated | Trench isolation of a CMOS structure |
| US5780346A (en) | 1996-12-31 | 1998-07-14 | Intel Corporation | N2 O nitrided-oxide trench sidewalls and method of making isolation structure |
| TW388100B (en) | 1997-02-18 | 2000-04-21 | Hitachi Ulsi Eng Corp | Semiconductor deivce and process for producing the same |
| US5811346A (en) * | 1997-04-14 | 1998-09-22 | Vlsi Technology, Inc. | Silicon corner rounding in shallow trench isolation process |
| US5863827A (en) * | 1997-06-03 | 1999-01-26 | Texas Instruments Incorporated | Oxide deglaze before sidewall oxidation of mesa or trench |
| US6080677A (en) * | 1997-06-17 | 2000-06-27 | Vlsi Technology, Inc. | Method for preventing micromasking in shallow trench isolation process etching |
| US6399462B1 (en) * | 1997-06-30 | 2002-06-04 | Cypress Semiconductor Corporation | Method and structure for isolating integrated circuit components and/or semiconductor active devices |
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| US7157385B2 (en) * | 2003-09-05 | 2007-01-02 | Micron Technology, Inc. | Method of depositing a silicon dioxide-comprising layer in the fabrication of integrated circuitry |
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| KR100515037B1 (ko) * | 1998-06-03 | 2005-11-30 | 삼성전자주식회사 | 트렌치 격리 제조 방법 |
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| JP4592837B2 (ja) * | 1998-07-31 | 2010-12-08 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
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| KR100287181B1 (ko) * | 1998-09-21 | 2001-04-16 | 윤종용 | 트렌치소자분리영역을갖는반도체소자및그제조방법 |
| KR100475048B1 (ko) * | 1998-09-24 | 2005-05-27 | 삼성전자주식회사 | 이중층의 질화물라이너를 갖는 트렌치 소자분리방법 |
| KR100292616B1 (ko) * | 1998-10-09 | 2001-07-12 | 윤종용 | 트렌치격리의제조방법 |
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| TW396521B (en) * | 1998-11-06 | 2000-07-01 | United Microelectronics Corp | Process for shallow trench isolation |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5226182A (en) * | 1975-08-25 | 1977-02-26 | Hitachi Ltd | Manufacturing method of semi-conductor unit |
| JPS55117243A (en) * | 1979-03-02 | 1980-09-09 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Fabrication of semiconductor device |
| JPS5848936A (ja) * | 1981-09-10 | 1983-03-23 | Fujitsu Ltd | 半導体装置の製造方法 |
| JPH073858B2 (ja) * | 1984-04-11 | 1995-01-18 | 株式会社日立製作所 | 半導体装置の製造方法 |
| US4580330A (en) * | 1984-06-15 | 1986-04-08 | Texas Instruments Incorporated | Integrated circuit isolation |
| JPS63234534A (ja) * | 1987-03-24 | 1988-09-29 | Oki Electric Ind Co Ltd | 半導体素子の製造方法 |
| US5258332A (en) * | 1987-08-28 | 1993-11-02 | Kabushiki Kaisha Toshiba | Method of manufacturing semiconductor devices including rounding of corner portions by etching |
| JP2955459B2 (ja) * | 1993-12-20 | 1999-10-04 | 株式会社東芝 | 半導体装置の製造方法 |
| JP3396553B2 (ja) * | 1994-02-04 | 2003-04-14 | 三菱電機株式会社 | 半導体装置の製造方法及び半導体装置 |
| US5453395A (en) * | 1994-03-21 | 1995-09-26 | United Microelectronics Corp. | Isolation technology using liquid phase deposition |
| US5455194A (en) * | 1995-03-06 | 1995-10-03 | Motorola Inc. | Encapsulation method for localized oxidation of silicon with trench isolation |
-
1995
- 1995-09-29 US US08/536,694 patent/US5719085A/en not_active Expired - Lifetime
-
1996
- 1996-08-21 TW TW085110215A patent/TW353215B/zh not_active IP Right Cessation
- 1996-09-23 EP EP96935930A patent/EP0856197B1/en not_active Expired - Lifetime
- 1996-09-23 WO PCT/US1996/015281 patent/WO1997014175A2/en not_active Ceased
- 1996-09-23 DE DE69638085T patent/DE69638085D1/de not_active Expired - Lifetime
- 1996-09-23 JP JP51505097A patent/JP4553410B2/ja not_active Expired - Fee Related
- 1996-09-23 KR KR1019980702311A patent/KR100316221B1/ko not_active Expired - Fee Related
- 1996-09-23 IL IL12375096A patent/IL123750A/en not_active IP Right Cessation
- 1996-09-23 AU AU73702/96A patent/AU7370296A/en not_active Abandoned
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| Publication number | Publication date |
|---|---|
| AU7370296A (en) | 1997-04-30 |
| DE69638085D1 (de) | 2009-12-31 |
| HK1015541A1 (en) | 1999-10-15 |
| KR19990063841A (ko) | 1999-07-26 |
| IL123750A0 (en) | 1998-10-30 |
| JPH11513538A (ja) | 1999-11-16 |
| US5719085A (en) | 1998-02-17 |
| IL123750A (en) | 2002-08-14 |
| EP0856197A4 (en) | 2000-08-09 |
| EP0856197A2 (en) | 1998-08-05 |
| EP0856197B1 (en) | 2009-11-18 |
| WO1997014175A2 (en) | 1997-04-17 |
| TW353215B (en) | 1999-02-21 |
| KR100316221B1 (ko) | 2002-03-13 |
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