JP4497708B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP4497708B2 JP4497708B2 JP2000374000A JP2000374000A JP4497708B2 JP 4497708 B2 JP4497708 B2 JP 4497708B2 JP 2000374000 A JP2000374000 A JP 2000374000A JP 2000374000 A JP2000374000 A JP 2000374000A JP 4497708 B2 JP4497708 B2 JP 4497708B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- output
- holding
- signal
- reset
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K21/00—Details of pulse counters or frequency dividers
- H03K21/40—Monitoring; Error detection; Preventing or correcting improper counter operation
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0995—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
- H03L7/0997—Controlling the number of delay elements connected in series in the ring oscillator
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
- H03L7/199—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division with reset of the frequency divider or the counter, e.g. for assuring initial synchronisation
Landscapes
- Manipulation Of Pulses (AREA)
- Dram (AREA)
- Shift Register Type Memory (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000374000A JP4497708B2 (ja) | 2000-12-08 | 2000-12-08 | 半導体装置 |
| US09/880,123 US6407597B1 (en) | 2000-12-08 | 2001-06-14 | Semiconductor device capable of immediately recovering from erroneous state to normal state |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000374000A JP4497708B2 (ja) | 2000-12-08 | 2000-12-08 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2002176354A JP2002176354A (ja) | 2002-06-21 |
| JP2002176354A5 JP2002176354A5 (enExample) | 2005-12-22 |
| JP4497708B2 true JP4497708B2 (ja) | 2010-07-07 |
Family
ID=18843280
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000374000A Expired - Lifetime JP4497708B2 (ja) | 2000-12-08 | 2000-12-08 | 半導体装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6407597B1 (enExample) |
| JP (1) | JP4497708B2 (enExample) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7477716B2 (en) * | 2003-06-25 | 2009-01-13 | Mosaid Technologies, Inc. | Start up circuit for delay locked loop |
| US7275204B2 (en) * | 2004-09-30 | 2007-09-25 | Marvell International Ltd. | Distributed ring control circuits for Viterbi traceback |
| US7190201B2 (en) | 2005-02-03 | 2007-03-13 | Mosaid Technologies, Inc. | Method and apparatus for initializing a delay locked loop |
| JP2007128611A (ja) * | 2005-11-04 | 2007-05-24 | Nec Electronics Corp | 半導体集積回路装置 |
| US7711940B2 (en) * | 2005-12-19 | 2010-05-04 | Samsung Electronics Co., Ltd. | Circuit block and circuit system having skew compensation, and skew compensation method |
| US7400178B2 (en) * | 2006-03-31 | 2008-07-15 | Integrated Device Technology, Inc. | Data output clock selection circuit for quad-data rate interface |
| US7671643B2 (en) * | 2008-01-03 | 2010-03-02 | Memsic, Inc. | Power-on-reset circuit having zero static power consumption |
| EP2351221B1 (en) * | 2008-10-31 | 2013-06-19 | Certicom Corp. | System for detecting a reset condition in an electronic circuit |
| US8072250B2 (en) * | 2009-09-14 | 2011-12-06 | Achronix Semiconductor Corporation | Reset signal distribution |
| US8493109B2 (en) * | 2010-03-31 | 2013-07-23 | Qualcomm Incorporated | System and method to control a power on reset signal |
| JP5494370B2 (ja) | 2010-09-07 | 2014-05-14 | 富士通株式会社 | 多相クロック生成回路 |
Family Cites Families (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3586982A (en) * | 1969-02-19 | 1971-06-22 | Westinghouse Electric Corp | Pulse count detector having fail-safe features |
| US3639740A (en) * | 1970-07-15 | 1972-02-01 | Collins Radio Co | Ring counter apparatus |
| JPS5534572A (en) * | 1978-09-04 | 1980-03-11 | Toshiba Corp | Counting circuit |
| JPS55118553U (enExample) * | 1979-02-13 | 1980-08-21 | ||
| JPS6035400A (ja) * | 1983-08-05 | 1985-02-23 | Sharp Corp | 相補形金属酸化膜半導体を用いた送信装置 |
| JPS61174232U (enExample) * | 1985-04-17 | 1986-10-30 | ||
| JPS62192097A (ja) * | 1986-02-18 | 1987-08-22 | Nec Ic Microcomput Syst Ltd | シフトレジスタ回路 |
| JPH0763135B2 (ja) * | 1986-09-05 | 1995-07-05 | 日本電気株式会社 | 半導体集積論理回路 |
| JPS63120523A (ja) * | 1986-11-07 | 1988-05-24 | Fujitsu Ltd | リングカウンタ回路 |
| JP2659186B2 (ja) * | 1987-03-17 | 1997-09-30 | 日本電気株式会社 | デイジタル可変分周回路 |
| JPH01232827A (ja) * | 1988-03-14 | 1989-09-18 | Matsushita Electric Ind Co Ltd | リングカウンタ装置 |
| JPH02181518A (ja) * | 1989-01-05 | 1990-07-16 | Fujitsu Ltd | リングカウンタ回路 |
| JPH0410811A (ja) * | 1990-04-27 | 1992-01-16 | Sanyo Electric Co Ltd | 低ノイズカウンタ及びこれを備えた撮像装置 |
| JPH0815252B2 (ja) * | 1991-03-27 | 1996-02-14 | 松下電器産業株式会社 | フリップフロップ回路 |
| JPH08162946A (ja) * | 1994-11-30 | 1996-06-21 | Fujitsu Ltd | カウンタ回路 |
| US5867409A (en) * | 1995-03-09 | 1999-02-02 | Kabushiki Kaisha Toshiba | Linear feedback shift register |
| JP3323054B2 (ja) * | 1996-04-01 | 2002-09-09 | 株式会社東芝 | 周波数逓倍回路 |
| JP3442924B2 (ja) * | 1996-04-01 | 2003-09-02 | 株式会社東芝 | 周波数逓倍回路 |
| JP3956062B2 (ja) * | 1996-07-30 | 2007-08-08 | ソニー株式会社 | 再生装置および方法 |
| JPH1168552A (ja) * | 1997-08-20 | 1999-03-09 | Sony Corp | 2n分周回路 |
| US6091794A (en) * | 1997-11-25 | 2000-07-18 | Stmicroelectronics, Inc. | Fast synchronous counter |
| JPH11251924A (ja) * | 1998-03-02 | 1999-09-17 | Hitachi Ltd | 分周回路およびこれを用いた直並列変換回路並びにシリアルデータ送受信回路 |
| JPH11355107A (ja) * | 1998-06-09 | 1999-12-24 | Matsushita Electric Ind Co Ltd | 高周波数クロック発生用回路 |
-
2000
- 2000-12-08 JP JP2000374000A patent/JP4497708B2/ja not_active Expired - Lifetime
-
2001
- 2001-06-14 US US09/880,123 patent/US6407597B1/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US20020070776A1 (en) | 2002-06-13 |
| US6407597B1 (en) | 2002-06-18 |
| JP2002176354A (ja) | 2002-06-21 |
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