JP3871381B2 - 可変出力インピーダンスを有するバッファ回路 - Google Patents
可変出力インピーダンスを有するバッファ回路 Download PDFInfo
- Publication number
- JP3871381B2 JP3871381B2 JP25381596A JP25381596A JP3871381B2 JP 3871381 B2 JP3871381 B2 JP 3871381B2 JP 25381596 A JP25381596 A JP 25381596A JP 25381596 A JP25381596 A JP 25381596A JP 3871381 B2 JP3871381 B2 JP 3871381B2
- Authority
- JP
- Japan
- Prior art keywords
- pull
- voltage
- output
- terminal
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0005—Modifications of input or output impedance
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
- Networks Using Active Elements (AREA)
- Dram (AREA)
- Analogue/Digital Conversion (AREA)
- Amplifiers (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/523,165 | 1995-09-05 | ||
| US08/523,165 US5606275A (en) | 1995-09-05 | 1995-09-05 | Buffer circuit having variable output impedance |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPH09130229A JPH09130229A (ja) | 1997-05-16 |
| JPH09130229A5 JPH09130229A5 (enExample) | 2004-09-09 |
| JP3871381B2 true JP3871381B2 (ja) | 2007-01-24 |
Family
ID=24083917
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP25381596A Expired - Fee Related JP3871381B2 (ja) | 1995-09-05 | 1996-09-04 | 可変出力インピーダンスを有するバッファ回路 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US5606275A (enExample) |
| JP (1) | JP3871381B2 (enExample) |
| KR (1) | KR100498789B1 (enExample) |
Families Citing this family (62)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5877632A (en) | 1997-04-11 | 1999-03-02 | Xilinx, Inc. | FPGA with a plurality of I/O voltage levels |
| US5958026A (en) * | 1997-04-11 | 1999-09-28 | Xilinx, Inc. | Input/output buffer supporting multiple I/O standards |
| KR100318685B1 (ko) * | 1997-08-22 | 2002-02-19 | 윤종용 | 프로그래머블임피던스콘트롤회로 |
| US6120551A (en) | 1997-09-29 | 2000-09-19 | Xilinx, Inc. | Hardwire logic device emulating an FPGA |
| JPH11186896A (ja) * | 1997-12-24 | 1999-07-09 | Nec Ic Microcomput Syst Ltd | 半導体装置 |
| KR100418520B1 (ko) * | 1998-05-19 | 2004-05-20 | 삼성전자주식회사 | 프로그래머블 임피던스 출력 드라이버의 코드 선택장치 |
| JP3640800B2 (ja) | 1998-05-25 | 2005-04-20 | 株式会社東芝 | 半導体装置 |
| DE19825258B4 (de) * | 1998-06-05 | 2005-11-17 | Telefonaktiebolaget Lm Ericsson (Publ) | Ausgangspufferschaltkreis zum Übertragen von digitalen Signalen über eine Übertragungsleitung mit Preemphasis |
| KR100422441B1 (ko) * | 1998-12-08 | 2004-05-17 | 삼성전자주식회사 | 임피던스 조절기능을 갖는 반도체 장치 |
| US6157206A (en) * | 1998-12-31 | 2000-12-05 | Intel Corporation | On-chip termination |
| US6674304B1 (en) | 1999-02-26 | 2004-01-06 | Motorola Inc. | Output buffer circuit and method of operation |
| US6836151B1 (en) * | 1999-03-24 | 2004-12-28 | Altera Corporation | I/O cell configuration for multiple I/O standards |
| US6218863B1 (en) | 1999-04-12 | 2001-04-17 | Intel Corporation | Dual mode input/output interface circuit |
| US6194924B1 (en) | 1999-04-22 | 2001-02-27 | Agilent Technologies Inc. | Multi-function controlled impedance output driver |
| US6317069B1 (en) | 1999-05-06 | 2001-11-13 | Texas Instruments Incorporated | Digital-to-analog converter employing binary-weighted transistor array |
| US6275119B1 (en) | 1999-08-25 | 2001-08-14 | Micron Technology, Inc. | Method to find a value within a range using weighted subranges |
| US6292407B1 (en) | 1999-10-12 | 2001-09-18 | Micron Technolgy, Inc. | Method and apparatus for circuit variable updates |
| KR100382718B1 (ko) * | 2000-08-21 | 2003-05-09 | 삼성전자주식회사 | 출력전류 보상회로를 구비하는 출력드라이버 |
| JP3670563B2 (ja) * | 2000-09-18 | 2005-07-13 | 株式会社東芝 | 半導体装置 |
| KR100391150B1 (ko) * | 2000-11-15 | 2003-07-16 | 삼성전자주식회사 | 다단의 상위 코드 선택기를 갖는 반도체 장치의 임피던스콘트롤 출력회로 및 그의 동작방법 |
| US6384621B1 (en) | 2001-02-22 | 2002-05-07 | Cypress Semiconductor Corp. | Programmable transmission line impedance matching circuit |
| US6657906B2 (en) * | 2001-11-28 | 2003-12-02 | Micron Technology, Inc. | Active termination circuit and method for controlling the impedance of external integrated circuit terminals |
| JP3966016B2 (ja) * | 2002-02-26 | 2007-08-29 | 株式会社デンソー | クランプ回路 |
| US6690211B1 (en) * | 2002-11-28 | 2004-02-10 | Jmicron Technology Corp. | Impedance matching circuit |
| JP3885773B2 (ja) * | 2003-06-30 | 2007-02-28 | 日本電気株式会社 | インピーダンス調整回路及び調整方法、インピーダンス調整回路を備える半導体装置 |
| US6924660B2 (en) * | 2003-09-08 | 2005-08-02 | Rambus Inc. | Calibration methods and circuits for optimized on-die termination |
| US7019553B2 (en) * | 2003-12-01 | 2006-03-28 | Micron Technology, Inc. | Method and circuit for off chip driver control, and memory device using same |
| US7057415B2 (en) * | 2003-12-10 | 2006-06-06 | Hewlett-Packard Development Company, L.P. | Output buffer compensation control |
| US6980020B2 (en) * | 2003-12-19 | 2005-12-27 | Rambus Inc. | Calibration methods and circuits for optimized on-die termination |
| US7248636B2 (en) * | 2004-04-20 | 2007-07-24 | Hewlett-Packard Development Company, L.P. | Systems and methods for adjusting an output driver |
| US7498846B1 (en) | 2004-06-08 | 2009-03-03 | Transmeta Corporation | Power efficient multiplexer |
| KR100610007B1 (ko) * | 2004-06-14 | 2006-08-08 | 삼성전자주식회사 | 임피던스 랜지 시프팅 기능을 갖는 반도체 장치의프로그래머블 임피던스 콘트롤 회로 및 그에 따른임피던스 랜지 시프팅 방법 |
| US7888962B1 (en) | 2004-07-07 | 2011-02-15 | Cypress Semiconductor Corporation | Impedance matching circuit |
| JP4562175B2 (ja) * | 2004-08-31 | 2010-10-13 | ルネサスエレクトロニクス株式会社 | 終端抵抗調整回路 |
| KR100598017B1 (ko) * | 2004-09-20 | 2006-07-06 | 삼성전자주식회사 | 기준 전압 변화에 따른 출력 특성 보정이 가능한 입력버퍼 및 출력 특성 보정이 가능한 입력 버퍼링 방법 |
| KR100699828B1 (ko) * | 2004-10-11 | 2007-03-27 | 삼성전자주식회사 | 임피던스 교정 회로와 이를 포함하는 집적 회로 및 이를이용한 출력 드라이버의 임피던스 조절 방법 |
| US7196567B2 (en) * | 2004-12-20 | 2007-03-27 | Rambus Inc. | Systems and methods for controlling termination resistance values for a plurality of communication channels |
| US7285976B2 (en) * | 2005-01-31 | 2007-10-23 | Freescale Semiconductor, Inc. | Integrated circuit with programmable-impedance output buffer and method therefor |
| US8096994B2 (en) * | 2005-02-17 | 2012-01-17 | Kyphon Sarl | Percutaneous spinal implants and methods |
| US7215579B2 (en) * | 2005-02-18 | 2007-05-08 | Micron Technology, Inc. | System and method for mode register control of data bus operating mode and impedance |
| US7583087B2 (en) * | 2005-02-22 | 2009-09-01 | Integrated Device Technology, Inc. | In-situ monitor of process and device parameters in integrated circuits |
| US7594149B2 (en) * | 2005-02-22 | 2009-09-22 | Integrated Device Technology, Inc. | In-situ monitor of process and device parameters in integrated circuits |
| DE102005009593B4 (de) * | 2005-02-28 | 2016-02-04 | Infineon Technologies Ag | Verfahren und Vorrichtung zum Einstellen der Ausgangsimpedanz einer Treiberstufe |
| KR100673897B1 (ko) | 2005-03-02 | 2007-01-25 | 주식회사 하이닉스반도체 | 반도체 소자의 출력 드라이버 |
| JP2006270331A (ja) * | 2005-03-23 | 2006-10-05 | Nec Corp | インピーダンス調整回路及び集積回路装置 |
| US7389194B2 (en) | 2005-07-06 | 2008-06-17 | Rambus Inc. | Driver calibration methods and circuits |
| US8036846B1 (en) | 2005-10-20 | 2011-10-11 | Cypress Semiconductor Corporation | Variable impedance sense architecture and method |
| JP4916699B2 (ja) * | 2005-10-25 | 2012-04-18 | エルピーダメモリ株式会社 | Zqキャリブレーション回路及びこれを備えた半導体装置 |
| KR100656470B1 (ko) * | 2006-02-07 | 2006-12-11 | 주식회사 하이닉스반도체 | 반도체 메모리의 드라이버 제어장치 및 방법 |
| JP4978094B2 (ja) * | 2006-07-31 | 2012-07-18 | 富士通セミコンダクター株式会社 | 出力バッファ回路 |
| WO2008147932A2 (en) * | 2007-05-24 | 2008-12-04 | Bitwave Semiconductor, Incorporated | Reconfigurable tunable rf power amplifier |
| US7551020B2 (en) * | 2007-05-31 | 2009-06-23 | Agere Systems Inc. | Enhanced output impedance compensation |
| KR100886644B1 (ko) * | 2007-08-29 | 2009-03-04 | 주식회사 하이닉스반도체 | 온 다이 터미네이션 장치의 캘리브래이션 회로 |
| US8368455B2 (en) * | 2007-12-31 | 2013-02-05 | Korea Institute Of Geoscience & Mineral Resources | Apparatus and method for automatic control of current electrodes for electrical resistivity survey |
| JP2009022029A (ja) * | 2008-09-01 | 2009-01-29 | Renesas Technology Corp | 半導体集積回路装置 |
| JP5642935B2 (ja) * | 2009-02-19 | 2014-12-17 | ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. | インピーダンス調整回路及びこれを備える半導体装置 |
| US7791367B1 (en) | 2009-06-05 | 2010-09-07 | Freescale Semiconductor, Inc. | Driver with selectable output impedance |
| KR101796116B1 (ko) | 2010-10-20 | 2017-11-10 | 삼성전자 주식회사 | 반도체 장치, 이를 포함하는 메모리 모듈, 메모리 시스템 및 그 동작방법 |
| US9362912B2 (en) * | 2014-03-25 | 2016-06-07 | SK Hynix Inc. | Data output circuit of semiconductor apparatus |
| JP2017216611A (ja) | 2016-06-01 | 2017-12-07 | マイクロン テクノロジー, インク. | 半導体装置 |
| EP3373526B1 (en) * | 2017-03-07 | 2020-01-08 | Nxp B.V. | Transmitter with independently adjustable voltage and impedance |
| CN114646407B (zh) * | 2022-05-20 | 2022-09-02 | 深圳众城卓越科技有限公司 | 电抗器热测试电路及热测试方法 |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56153832A (en) * | 1980-04-30 | 1981-11-28 | Nec Corp | Digital to analog converter |
| US5134311A (en) * | 1990-06-07 | 1992-07-28 | International Business Machines Corporation | Self-adjusting impedance matching driver |
| JPH04169915A (ja) * | 1990-11-02 | 1992-06-17 | Hitachi Ltd | 半導体集積回路 |
| US5055847A (en) * | 1991-02-19 | 1991-10-08 | Motorola, Inc. | Differential sensing current-steering analog-to-digital converter |
| US5311084A (en) * | 1992-06-23 | 1994-05-10 | At&T Bell Laboratories | Integrated circuit buffer with controlled rise/fall time |
| JPH06216751A (ja) * | 1993-01-20 | 1994-08-05 | Hitachi Ltd | Cmos集積回路装置とそれを用いた情報処理システム |
| US5457407A (en) * | 1994-07-06 | 1995-10-10 | Sony Electronics Inc. | Binary weighted reference circuit for a variable impedance output buffer |
| KR970005570B1 (ko) * | 1994-07-14 | 1997-04-17 | 현대전자산업 주식회사 | 데이타 출력버퍼 |
| KR0124141B1 (ko) * | 1994-12-29 | 1998-10-01 | 김광호 | 반도체 메모리장치의 데이타 출력 버퍼회로 |
| KR19990066370A (ko) * | 1998-01-24 | 1999-08-16 | 구본준 | 고속 출력버퍼 |
-
1995
- 1995-09-05 US US08/523,165 patent/US5606275A/en not_active Expired - Lifetime
-
1996
- 1996-09-02 KR KR1019960037788A patent/KR100498789B1/ko not_active Expired - Fee Related
- 1996-09-04 JP JP25381596A patent/JP3871381B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH09130229A (ja) | 1997-05-16 |
| KR100498789B1 (ko) | 2005-10-04 |
| KR970017597A (ko) | 1997-04-30 |
| US5606275A (en) | 1997-02-25 |
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