JP2019534384A - パターニングのための膜の堆積及び処理 - Google Patents
パターニングのための膜の堆積及び処理 Download PDFInfo
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- 125000000026 trimethylsilyl group Chemical group [H]C([H])([H])[Si]([*])(C([H])([H])[H])C([H])([H])[H] 0.000 description 1
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76837—Filling up the space between adjacent conductive structures; Gap-filling properties of dielectrics
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
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- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02244—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of a metallic layer
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
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- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0332—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their composition, e.g. multilayer masks, materials
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- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0335—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by their behaviour during the process, e.g. soluble masks, redeposited masks
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76227—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials the dielectric materials being obtained by full chemical transformation of non-dielectric materials, such as polycristalline silicon, metals
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
- H01L21/76813—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving a partial via etch
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76816—Aspects relating to the layout of the pattern or to the size of vias or trenches
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
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- Inorganic Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Vapour Deposition (AREA)
- Formation Of Insulating Films (AREA)
- Physical Vapour Deposition (AREA)
Abstract
Description
Claims (15)
- 少なくとも1つのトレンチを有する基板表面を提供することであって、前記少なくとも1つのトレンチが、前記基板表面から底面に至るある深さにわたって延在し、かつ、第1側壁及び第2側壁によって画定された幅を有する、基板表面を提供することと、
前記基板表面上ではなく前記トレンチ内に膜材料体積を有する初期膜を形成するために、膜材料を選択的に堆積させることであって、前記膜材料が、2を上回るピリング‐ベドワース比を有し、かつ、Co、Cr、Fe、Mn、Nb、Os、Ta、U、W、及びVからなる群から選択された材料を含む、膜材料を選択的に堆積させることと、
前記膜材料体積を膨張させて、前記基板表面を越えて延在する膨張膜を提供するために、前記初期膜を処理することとを含む、
処理方法。 - 前記膜材料が、Co、Fe、Mn、Nb、Os、Ta、U、及びVからなる群から選択される、請求項1に記載の方法。
- 前記初期膜を処理することが、前記初期膜を酸化環境に曝露することを含む、請求項2に記載の方法。
- 前記膨張膜が、CoO、Fe2O3、Fe3O4、MnO2、Mn2O3、Mn3O4、MoO3、Nb2O5、Ta2O5、OsO2、UO2、及びV2O5からなる群から選択された材料を含む、請求項3に記載の方法。
- 前記膜材料が、2.5を上回るピリング‐ベドワース比を有し、かつ、Mo、Os、及びVからなる群から選択される、請求項1に記載の方法。
- 前記初期膜を処理することが、前記初期膜を酸化環境に曝露することを含む、請求項4に記載の方法。
- 前記膨張膜が、MoO3、OsO2、及びV2O5からなる群から選択された材料を含む、請求項5に記載の方法。
- 前記初期膜を処理することが、前記初期膜を窒化環境に曝露することを含む、請求項1に記載の方法。
- 前記膜材料が、Cr、Mo、及びOsからなる群から選択される、請求項8に記載の方法。
- 前記膨張膜が、CrN2、MoN2、及びOsN2からなる群から選択された材料を含む、請求項8に記載の方法。
- 前記初期膜を処理することが、前記初期膜を、O2、O3、N2O、H2O、H2O2、CO、CO2、NH3、N2/Ar、N2/He、若しくはN2/Ar/Heのうちの一又は複数を含む酸化剤、及び/又は、アンモニア、ヒドラジン、NO2、若しくは窒素プラズマのうちの一又は複数を含む窒化剤に、曝露することを含む、請求項1に記載の方法。
- 前記初期膜を処理することが約300℃を上回る温度で行われる、請求項1に記載の方法。
- 少なくとも1つのトレンチを有する基板表面を提供することであって、前記少なくとも1つのトレンチが、前記基板表面から底面に至るある深さにわたって延在し、かつ、第1側壁及び第2側壁によって画定された幅を有する、基板表面を提供することと、
前記基板表面上ではなく前記トレンチ内に膜材料体積を有する初期膜を形成するために、膜材料を選択的に堆積させることであって、前記膜材料が、2を上回るピリング‐ベドワース比を有し、かつ、Co、Cr、Fe、Mn、Nb、Os、Ta、U、W、及びVからなる群から選択された材料を含む、膜材料を選択的に堆積させることと、
前記基板表面を越えて延在する膨張膜を提供するために、Co、Cr、Fe、Mn、Nb、Os、Ta、U、W、又はVからなる群から選択された金属の窒化物を形成して前記膜材料体積を膨張させるよう、前記初期膜を処理することとを含む、
処理方法。 - 前記膜材料が、Cr、Mo、及びOsからなる群から選択された金属を含む、請求項13に記載の方法。
- 前記膨張膜が、CrN2、MoN2、及びOsN2からなる群から選択された材料を含む、請求項13に記載の方法。
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TWI719262B (zh) | 2021-02-21 |
KR20190067933A (ko) | 2019-06-17 |
US20190252252A1 (en) | 2019-08-15 |
US10319636B2 (en) | 2019-06-11 |
US20180144980A1 (en) | 2018-05-24 |
EP3535782A2 (en) | 2019-09-11 |
EP3535782A4 (en) | 2020-10-28 |
WO2018085554A2 (en) | 2018-05-11 |
CN109923661A (zh) | 2019-06-21 |
TW201829822A (zh) | 2018-08-16 |
US10699952B2 (en) | 2020-06-30 |
WO2018085554A3 (en) | 2018-06-21 |
KR102317050B1 (ko) | 2021-10-26 |
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