JP2018006731A - 半導体装置、当該半導体装置の作製方法、及び当該半導体装置を有する表示装置 - Google Patents
半導体装置、当該半導体装置の作製方法、及び当該半導体装置を有する表示装置 Download PDFInfo
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- JP2018006731A JP2018006731A JP2017037854A JP2017037854A JP2018006731A JP 2018006731 A JP2018006731 A JP 2018006731A JP 2017037854 A JP2017037854 A JP 2017037854A JP 2017037854 A JP2017037854 A JP 2017037854A JP 2018006731 A JP2018006731 A JP 2018006731A
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Classifications
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- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
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- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
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- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
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Abstract
Description
本実施の形態では、本発明の一態様の半導体装置及び半導体装置の作製方法について、図1乃至図10を参照して説明する。
図1(A)は、本発明の一態様の半導体装置であるトランジスタ100の上面図であり、図1(B)は、図1(A)に示す一点鎖線X1−X2間における切断面の断面図に相当し、図1(C)は、図1(A)に示す一点鎖線Y1−Y2間における切断面の断面図に相当する。なお、図1(A)において、煩雑になることを避けるため、トランジスタ100の構成要素の一部(ゲート絶縁膜として機能する絶縁膜等)を省略して図示している。また、一点鎖線X1−X2方向をチャネル長方向、一点鎖線Y1−Y2方向をチャネル幅方向と呼称する場合がある。なお、トランジスタの上面図においては、以降の図面においても図1(A)と同様に、構成要素の一部を省略して図示する場合がある。
次に、本実施の形態の半導体装置に含まれる構成要素について、詳細に説明する。
基板102の材質などに大きな制限はないが、少なくとも、後の熱処理に耐えうる程度の耐熱性を有している必要がある。例えば、ガラス基板、セラミック基板、石英基板、サファイア基板等を、基板102として用いてもよい。また、シリコンや炭化シリコンを材料とした単結晶半導体基板、多結晶半導体基板、シリコンゲルマニウム等の化合物半導体基板、SOI基板等を適用することも可能であり、これらの基板上に半導体素子が設けられたものを、基板102として用いてもよい。なお、基板102として、ガラス基板を用いる場合、第6世代(1500mm×1850mm)、第7世代(1870mm×2200mm)、第8世代(2200mm×2400mm)、第9世代(2400mm×2800mm)、第10世代(2950mm×3400mm)等の大面積基板を用いることで、大型の表示装置を作製することができる。
ゲート電極として機能する導電膜104、ソース電極として機能する導電膜112a、ドレイン電極として機能する導電膜112bとしては、クロム(Cr)、銅(Cu)、アルミニウム(Al)、金(Au)、銀(Ag)、亜鉛(Zn)、モリブデン(Mo)、タンタル(Ta)、チタン(Ti)、タングステン(W)、マンガン(Mn)、ニッケル(Ni)、鉄(Fe)、コバルト(Co)から選ばれた金属元素、または上述した金属元素を成分とする合金か、上述した金属元素を組み合わせた合金等を用いてそれぞれ形成することができる。
トランジスタ100のゲート絶縁膜として機能する絶縁膜106としては、プラズマ化学気相堆積(PECVD:Plasma Enhanced Chemical Vapor Deposition)法、スパッタリング法等により、酸化シリコン膜、酸化窒化シリコン膜、窒化酸化シリコン膜、窒化シリコン膜、酸化アルミニウム膜、酸化ハフニウム膜、酸化イットリウム膜、酸化ジルコニウム膜、酸化ガリウム膜、酸化タンタル膜、酸化マグネシウム膜、酸化ランタン膜、酸化セリウム膜および酸化ネオジム膜を一種以上含む絶縁層を用いることができる。なお、絶縁膜106を、2層以上の積層構造としてもよい。
酸化物半導体膜108としては、先に示す材料を用いることができる。
絶縁膜114、116は、トランジスタ100の保護絶縁膜としての機能を有する。また、絶縁膜114、116は、酸化物半導体膜108に酸素を供給する機能を有する。すなわち、絶縁膜114、116は、酸素を有する。また、絶縁膜114は、酸素を透過することのできる絶縁膜である。なお、絶縁膜114は、後に形成する絶縁膜116を形成する際の、酸化物半導体膜108へのダメージ緩和膜としても機能する。
絶縁膜118は、トランジスタ100の保護絶縁膜として機能する。
次に、図1(A)(B)(C)に示すトランジスタ100の変形例について、図2乃至図5を用いて説明する。
次に、本発明の一態様の半導体装置であるトランジスタ100Bの作製方法について、図6乃至図9を用いて説明する。
本実施の形態では、本発明の一態様である酸化物半導体膜について、図11乃至図30を用いて説明を行う。
本発明の一態様の酸化物半導体膜の概念図を図11乃至図14に示す。なお、図11(A)、図12(A)、図13(A)、及び図14(A)は、酸化物半導体膜の上面(a−b面方向)の概念図であり、図11(B)、図12(B)、図13(B)、及び図14(B)は、基板(Sub.)上に酸化物半導体膜が形成された断面(c軸方向)の概念図である。
次に、本発明の一態様の酸化物半導体膜の原子数比について、図15を用いて説明する。
ここで、スパッタリング装置の一例について、図16(A)(B)を用いて説明を行う。
次に、酸化物半導体膜のキャリア密度について、以下に説明を行う。
次に、酸化物半導体の構造について説明する。
まずは、CAAC−OSについて説明する。
次に、nc−OSについて説明する。
a−like OSは、nc−OSと非晶質酸化物半導体との間の構造を有する酸化物半導体である。
以下では、条件の異なる3つの酸化物半導体膜が形成された試料(試料X1乃至試料X3)を作製し結晶性の評価を行った。まず、試料X1乃至試料X3の作製方法について、説明する。
試料X1は、ガラス基板上に厚さ約100nmの酸化物半導体膜が形成された試料である。当該酸化物半導体膜は、インジウムと、ガリウムと、亜鉛とを有する。試料X1の酸化物半導体膜の形成条件としては、基板を170℃に加熱し、流量140sccmのアルゴンガスと流量60sccmの酸素ガスとをスパッタリング装置のチャンバー内に導入し、圧力を0.6Paとし、インジウムと、ガリウムと、亜鉛とを有する金属酸化物ターゲット(In:Ga:Zn=4:2:4.1[原子数比])に、2.5kWの交流電力を印加することで形成した。なお、試料X1の作製条件における酸素流量比は30%である。
試料X2は、ガラス基板上に厚さ約100nmの酸化物半導体膜が成膜された試料である。試料X2の酸化物半導体膜の形成条件としては、基板を130℃に加熱し、流量180sccmのアルゴンガスと、流量20sccmの酸素ガスとをスパッタリング装置のチャンバー内に導入して形成した。試料X2の作製条件における酸素流量比は10%である。なお、基板温度、及び酸素流量比以外の条件としては、先に示す試料X1と同様の条件とした。
試料X3は、ガラス基板上に厚さ約100nmの酸化物半導体膜が成膜された試料である。試料X3の酸化物半導体膜の形成条件としては、基板温度を室温とし、流量180sccmのアルゴンガスと、流量20sccmの酸素ガスとをスパッタリング装置のチャンバー内に導入して形成した。試料X3の作製条件における酸素流量比は10%である。なお、基板温度、及び酸素流量比以外の条件としては、先に示す試料X1と同様の条件とした。
図18乃至図20に、試料X1乃至試料X3の断面TEM観察結果を示す。なお、図18(A)(B)は試料X1の断面TEM像であり、図19(A)(B)は試料X2の断面TEM像であり、図20(A)(B)は試料X3の断面TEM像である。
次に、各試料のXRD測定結果について説明する。
次に、試料X1乃至試料X3について、電子線回折測定を行った結果について説明する。電子線回折測定では、各試料の断面に対して電子線を垂直に入射したときの電子線回折パターンを取得する。また電子線のビーム径を、1nmΦ及び100nmΦの2つとした。
次に、図24乃至図26を用いて、酸化物半導体膜の結晶性の定量化方法の一例について説明する。
上述のように、第1の領域における輝度の積分強度と、第2の領域における輝度の積分強度との強度比は、配向性を有する結晶部の存在割合を推し量る点で重要な情報である。
・試料X1の相対輝度R=25.00
・試料X2の相対輝度R=3.04
・試料X3の相対輝度R=1.05
なお、上述の相対輝度Rは、4つの位置での平均値とした。このように、相対輝度Rは、試料X1、試料X2、試料X3の順で高い。
酸化物半導体膜中の結晶部の存在割合は、断面TEM像を解析することで見積もることができる。
次に、酸化物半導体膜への酸素の拡散のしやすさを評価した結果について説明する。
まず、ガラス基板上に、先に示す試料X1と同様の方法により、厚さ約50nmの酸化物半導体膜を成膜した。続いて、酸化物半導体膜上に、厚さ約30nmの酸化窒化シリコン膜、厚さ約100nmの酸化窒化シリコン膜、厚さ約20nmの酸化窒化シリコン膜を、PECVD法により積層して形成した。なお、以下の説明において、酸化物半導体膜をOSと、酸化窒化シリコン膜をGIとしてそれぞれ記載する場合がある。
試料Y2は、試料Y1の酸化物半導体膜の成膜条件を異ならせた試料である。試料Y2は、先に示す試料X2と同様の方法により、厚さ約50nmの酸化物半導体膜を成膜した。
試料Y3は、試料Y1の酸化物半導体膜の成膜条件を異ならせた試料である。試料Y3は、先に示す試料X3と同様の方法により、厚さ約50nmの酸化物半導体膜を成膜した。
試料Y1乃至試料Y3について、SIMS(Secondary Ion Mass Spectrometry)分析により、18Oの濃度を測定した。なお、SIMS分析においては、上記作製した試料Y1乃至試料Y3を、熱処理を行わず評価する条件と、試料Y1乃至試料Y3を窒素雰囲気下にて350℃ 1時間の熱処理を行う条件と、試料Y1乃至試料Y3を窒素雰囲気下にて450℃、1時間の熱処理を行う条件と、の3つの条件とした。
次に、本発明の一態様の酸化物半導体膜の成膜方法について説明する。
本実施の形態においては、先の実施の形態で例示したトランジスタを有する表示装置の一例について、図31乃至図37を用いて以下説明を行う。
図32及び図34に示す表示装置700は、引き回し配線部711と、画素部702と、ソースドライバ回路部704と、FPC端子部708と、を有する。また、引き回し配線部711は、信号線710を有する。また、画素部702は、トランジスタ750及び容量素子790を有する。また、ソースドライバ回路部704は、トランジスタ752を有する。
図32に示す表示装置700は、液晶素子775を有する。液晶素子775は、導電膜772、導電膜774、及び液晶層776を有する。導電膜774は、第2の基板705側に設けられ、対向電極としての機能を有する。図32に示す表示装置700は、導電膜772と導電膜774に印加される電圧によって、液晶層776の配向状態が変わることによって光の透過、非透過が制御され画像を表示することができる。
図34に示す表示装置700は、発光素子782を有する。発光素子782は、導電膜772、EL層786、及び導電膜788を有する。図34に示す表示装置700は、発光素子782が有するEL層786が発光することによって、画像を表示することができる。なお、EL層786は、有機化合物、または量子ドットなどの無機化合物を有する。
また、図34及び図35に示す表示装置700に入出力装置を設けてもよい。当該入出力装置としては、例えば、タッチパネル等が挙げられる。
本実施の形態では、本発明の一態様の半導体装置を有する表示装置について、図38を用いて説明を行う。
図38(A)に示す表示装置は、表示素子の画素を有する領域(以下、画素部502という)と、画素部502の外側に配置され、画素を駆動するための回路を有する回路部(以下、駆動回路部504という)と、素子の保護機能を有する回路(以下、保護回路506という)と、端子部507と、を有する。なお、保護回路506は、設けない構成としてもよい。
本実施の形態では、本発明の一態様の半導体装置を有する表示モジュール及び電子機器について、図39乃至図42を用いて説明を行う。
図39に示す表示モジュール7000は、上部カバー7001と下部カバー7002との間に、FPC7003に接続されたタッチパネル7004、FPC7005に接続された表示パネル7006、バックライト7007、フレーム7009、プリント基板7010、バッテリ7011を有する。
次に、図40(A)乃至図40(E)に電子機器の一例を示す。
次に、図40(A)乃至図40(E)に示す電子機器と、異なる電子機器の一例を図41(A)乃至図41(G)に示す。
試料A1は、ガラス基板上に厚さ100nmの酸化物半導体膜が形成された試料である。試料A1の酸化物半導体膜の形成条件としては、基板温度を室温とし、流量180sccmのアルゴンガスと流量20sccmの酸素ガスとをスパッタリング装置のチャンバー内に導入し、圧力を0.6Paとし、インジウムと、ガリウムと、亜鉛とを有する金属酸化物ターゲット(In:Ga:Zn=4:2:4.1[原子数比])に、2.5kWの交流電力を印加することで形成した。上述のガス流量比は、全体のガス流量に対する酸素流量の割合から、酸素流量比と記載する場合がある。なお、試料A1の作製条件における酸素流量比は10%である。
試料A2は、ガラス基板上に厚さ100nmの酸化物半導体膜が形成された試料である。試料A2の酸化物半導体膜の形成条件としては、基板温度を室温とし、流量200sccmの酸素ガスをスパッタリング装置のチャンバー内に導入し、圧力を0.6Paとし、インジウムと、ガリウムと、亜鉛とを有する金属酸化物ターゲット(In:Ga:Zn=4:2:4.1[原子数比])に、2.5kWの交流電力を印加することで形成した。なお、試料A2の作製条件における酸素流量比は100%である。
次に、上記作製した試料A1及び試料A2に形成された酸化物半導体膜の結晶性について評価を行った。当該結晶性の評価には、XRD測定を用いた。
100A トランジスタ
100B トランジスタ
100C トランジスタ
100D トランジスタ
102 基板
104 導電膜
106 絶縁膜
108 酸化物半導体膜
108_1 酸化物半導体膜
108_1_0 酸化物半導体膜
108_2 酸化物半導体膜
108_2_0 酸化物半導体膜
108_3 酸化物半導体膜
108_3_0 酸化物半導体膜
112 導電膜
112a 導電膜
112a_1 導電膜
112a_2 導電膜
112a_3 導電膜
112b 導電膜
112b_1 導電膜
112b_2 導電膜
112b_3 導電膜
114 絶縁膜
116 絶縁膜
118 絶縁膜
120 導電膜
120a 導電膜
120b 導電膜
141a 開口部
141b 開口部
142a 開口部
142b 開口部
191 ターゲット
192 プラズマ
193 ターゲット
194 プラズマ
501 画素回路
502 画素部
504 駆動回路部
504a ゲートドライバ
504b ソースドライバ
506 保護回路
507 端子部
550 トランジスタ
552 トランジスタ
554 トランジスタ
560 容量素子
562 容量素子
570 液晶素子
572 発光素子
700 表示装置
701 第1の基板
702 画素部
704 ソースドライバ回路部
705 第2の基板
706 ゲートドライバ回路部
708 FPC端子部
710 信号線
711 引き回し配線部
712 シール材
716 FPC
730 絶縁膜
732 封止膜
734 絶縁膜
736 着色膜
738 遮光膜
750 トランジスタ
752 トランジスタ
760 接続電極
770 平坦化絶縁膜
772 導電膜
773 絶縁膜
774 導電膜
775 液晶素子
776 液晶層
777 導電膜
778 構造体
780 異方性導電膜
782 発光素子
786 EL層
788 導電膜
790 容量素子
791 タッチパネル
792 絶縁膜
793 電極
794 電極
795 絶縁膜
796 電極
797 絶縁膜
2500a ターゲット
2500b ターゲット
2501 成膜室
2510a バッキングプレート
2510b バッキングプレート
2520 ターゲットホルダ
2520a ターゲットホルダ
2520b ターゲットホルダ
2530a マグネットユニット
2530b マグネットユニット
2530N1 マグネット
2530N2 マグネット
2530S マグネット
2532 マグネットホルダ
2542 部材
2560 基板
2570 基板ホルダ
2580a 磁力線
2580b 磁力線
7000 表示モジュール
7001 上部カバー
7002 下部カバー
7003 FPC
7004 タッチパネル
7005 FPC
7006 表示パネル
7007 バックライト
7008 光源
7009 フレーム
7010 プリント基板
7011 バッテリ
8000 カメラ
8001 筐体
8002 表示部
8003 操作ボタン
8004 シャッターボタン
8006 レンズ
8100 ファインダー
8101 筐体
8102 表示部
8103 ボタン
8200 ヘッドマウントディスプレイ
8201 装着部
8202 レンズ
8203 本体
8204 表示部
8205 ケーブル
8206 バッテリ
8300 ヘッドマウントディスプレイ
8301 筐体
8302 表示部
8304 固定具
8305 レンズ
9000 筐体
9001 表示部
9003 スピーカ
9005 操作キー
9006 接続端子
9007 センサ
9008 マイクロフォン
9050 操作ボタン
9051 情報
9052 情報
9053 情報
9054 情報
9055 ヒンジ
9100 テレビジョン装置
9101 携帯情報端末
9102 携帯情報端末
9200 携帯情報端末
9201 携帯情報端末
9500 表示装置
9501 表示パネル
9502 表示領域
9503 領域
9511 軸部
9512 軸受部
Claims (12)
- 酸化物半導体膜を有する半導体装置であって、
前記半導体装置は、
ゲート電極と、
前記ゲート電極上の絶縁膜と、
前記絶縁膜上の前記酸化物半導体膜と、
前記酸化物半導体膜上の一対の電極と、を有し、
前記酸化物半導体膜は、
第1の酸化物半導体膜と、
前記第1の酸化物半導体膜上の第2の酸化物半導体膜と、
前記第2の酸化物半導体膜上の第3の酸化物半導体膜と、を有し、
前記第1乃至第3の酸化物半導体膜は、
それぞれ、同じ元素を有し、
前記第2の酸化物半導体膜は、前記第1の酸化物半導体膜及び前記第3の酸化物半導体膜のいずれか一方または双方よりも結晶性が低い領域を有する、
ことを特徴とする半導体装置。 - 請求項1において、
前記第1乃至第3の酸化物半導体膜は、それぞれ独立に、
Inと、M(MはAl、Ga、Y、またはSn)と、Znと、を有する、
ことを特徴とする半導体装置。 - 請求項2において、
前記In、前記M、及び前記Znの原子数比は、
In:M:Zn=4:2:3近傍であり、
前記Inが4の場合、前記Mが1.5以上2.5以下であり、且つ前記Znが2以上4以下である、
ことを特徴とする半導体装置。 - 請求項2において、
前記In、前記M、及び前記Znの原子数比は、
In:M:Zn=5:1:6近傍であり、
前記Inが5の場合、前記Mが0.5以上1.5以下であり、且つ前記Znが5以上7以下である、
ことを特徴とする半導体装置。 - 請求項1または請求項2において、
前記第2の酸化物半導体膜は、
InaMbZncOd(MはAl、Ga、Y、またはSnを表し、a、b、c、及びdは任意数を表す)を有する第1の領域と、
InxZnyOz(x、y、及びzは任意数を表す)を有する第2の領域と、を有する、複合酸化物半導体である、
ことを特徴とする半導体装置。 - 請求項1または請求項2において、
前記第2の酸化物半導体膜は、前記第1の酸化物半導体膜及び前記第3の酸化物半導体膜のいずれか一方または双方よりも厚い領域を有する、
ことを特徴とする半導体装置。 - 請求項1または請求項2において、
前記第1の酸化物半導体膜及び前記第3の酸化物半導体膜のいずれか一方または双方は、
結晶部を有し、
前記結晶部は、c軸配向性を有する、
ことを特徴とする半導体装置。 - 請求項1乃至請求項7のいずれか一項に記載の半導体装置と、
表示素子と、を有する、
ことを特徴とする表示装置。 - 請求項8に記載の表示装置と、
タッチセンサと、を有する、
ことを特徴とする表示モジュール。 - 請求項1乃至請求項7のいずれか一項に記載の半導体装置、請求項8に記載の表示装置、または請求項9に記載の表示モジュールと、
操作キーまたはバッテリと、を有する、
ことを特徴とする電子機器。 - 酸化物半導体膜を有する半導体装置の作製方法であって、
ゲート電極を形成する工程と、
前記ゲート電極上に絶縁膜を形成する工程と、
前記絶縁膜上に前記酸化物半導体膜を形成する工程と、
前記酸化物半導体膜上に一対の電極を形成する工程と、を有し、
前記酸化物半導体膜を形成する工程は、
第1の酸化物半導体膜を形成する工程と、
前記第1の酸化物半導体膜上に第2の酸化物半導体膜を形成する工程と、
前記第2の酸化物半導体膜上に第3の酸化物半導体膜を形成する工程と、を有し、
前記第1の酸化物半導体膜乃至前記第3の酸化物半導体膜は、スパッタリング装置を用いて、真空中で連続して形成される、
ことを特徴とする半導体装置の作製方法。 - 請求項11において、
前記第2の酸化物半導体膜は、前記第1の酸化物半導体膜及び前記第3の酸化物半導体膜のいずれか一方または双方よりも、低い酸素分圧で形成される、
ことを特徴とする半導体装置の作製方法。
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- 2017-02-27 CN CN202310067813.1A patent/CN115954389A/zh active Pending
- 2017-02-27 WO PCT/IB2017/051122 patent/WO2017149428A1/en active Application Filing
- 2017-02-27 CN CN201780014556.8A patent/CN108780818B/zh active Active
- 2017-02-28 US US15/444,703 patent/US20170256654A1/en not_active Abandoned
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Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
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KR20200103820A (ko) | 2018-01-30 | 2020-09-02 | 가부시키가이샤 신가와 | 액추에이터 및 와이어 본딩 장치 |
KR20200106177A (ko) | 2018-01-30 | 2020-09-11 | 가부시키가이샤 신가와 | 와이어 본딩 장치 |
KR20220062428A (ko) | 2018-01-30 | 2022-05-16 | 가부시키가이샤 신가와 | 와이어 본딩 장치 |
KR20200120692A (ko) | 2019-03-18 | 2020-10-21 | 가부시키가이샤 신가와 | 캐필러리 안내 장치 및 와이어 본딩 장치 |
US11717912B2 (en) | 2019-03-18 | 2023-08-08 | Shinkawa Ltd. | Capillary guide device and wire bonding apparatus |
WO2022106953A1 (ja) * | 2020-11-17 | 2022-05-27 | 株式会社半導体エネルギー研究所 | 半導体装置、及び半導体装置の作製方法 |
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TW201801330A (zh) | 2018-01-01 |
KR20180124874A (ko) | 2018-11-21 |
CN108780818A (zh) | 2018-11-09 |
CN115954389A (zh) | 2023-04-11 |
JP2024009865A (ja) | 2024-01-23 |
JP7008415B2 (ja) | 2022-01-25 |
US11869981B2 (en) | 2024-01-09 |
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CN108780818B (zh) | 2023-01-31 |
JP7361811B2 (ja) | 2023-10-16 |
WO2017149428A1 (en) | 2017-09-08 |
TW202125838A (zh) | 2021-07-01 |
JP2022062025A (ja) | 2022-04-19 |
TWI778888B (zh) | 2022-09-21 |
TWI754506B (zh) | 2022-02-01 |
US11437524B2 (en) | 2022-09-06 |
US20200185538A1 (en) | 2020-06-11 |
TWI717476B (zh) | 2021-02-01 |
TW202213799A (zh) | 2022-04-01 |
US20170256654A1 (en) | 2017-09-07 |
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