JP2017011000A - 半導体装置および半導体装置の製造方法 - Google Patents
半導体装置および半導体装置の製造方法 Download PDFInfo
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- JP2017011000A JP2017011000A JP2015122469A JP2015122469A JP2017011000A JP 2017011000 A JP2017011000 A JP 2017011000A JP 2015122469 A JP2015122469 A JP 2015122469A JP 2015122469 A JP2015122469 A JP 2015122469A JP 2017011000 A JP2017011000 A JP 2017011000A
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Abstract
【解決手段】まず、n-型ドリフト層1となるn-型半導体基板のおもて面に、FS構造のRC−IGBTのおもて面素子構造を形成する。次に、n-型半導体基板の裏面にp+型コレクタ領域10、n+型カソード領域11およびn+型FS層12を形成する。n+型FS層12はセレンを用いて形成される。次に、n-型半導体基板の裏面から軽イオンを照射し、n-型ドリフト層1の内部に第1低ライフタイム領域31を形成する。次に、n-型半導体基板の裏面から軽イオンを照射し、n+型FS層12の内部に第2低ライフタイム領域32を形成する。次に、アニール処理により、n+型FS層12内部の結晶欠陥の欠陥密度を低減する。
【選択図】図1
Description
実施の形態にかかる半導体装置の製造方法により作製(製造)される半導体装置について説明する。図1は、実施の形態にかかる半導体装置の製造方法により製造される半導体装置の構成を示す断面図である。図1に示す実施の形態にかかる半導体装置は、n-型ドリフト層1となる同一のn-型半導体基板上に、絶縁ゲート型バイポーラトランジスタ(IGBT)が設けられたIGBT部21と、還流用ダイオード(FWD)が設けられたFWD部22と、を備える。FWD部22のFWDは、IGBT部21のIGBTに逆並列に接続されている。すなわち、図1に示す実施の形態にかかる半導体装置は、逆導通型IGBT(RC−IGBT)である。
2 p型ベース層
3 トレンチ
4 ゲート酸化膜
5 ゲート電極
6 n+型エミッタ領域
7 p+型コンタクト領域
8 エミッタ電極
9 層間絶縁膜
10 p+型コレクタ領域
11 n+型カソード領域
12 n+型FS層
13 コレクタ電極
20 MOSゲート構造
21 IGBT部
22 FWD部
31 第1低ライフタイム領域
32 第2低ライフタイム領域
Claims (14)
- 第1導電型のドリフト層を有する半導体基板、前記半導体基板のおもて面側に設けられた第2導電型のベース層、前記ベース層内に選択的に設けられた第1導電型のエミッタ領域、前記半導体基板のおもて面側に設けられたゲート絶縁膜およびゲート電極を備えた絶縁ゲート部、前記ベース層と前記エミッタ領域との両方に電気的に接続するエミッタ電極、前記半導体基板の裏面側に選択的に設けられた第2導電型のコレクタ領域、および前記コレクタ領域に電気的に接続するコレクタ電極を備えた絶縁ゲート型バイポーラトランジスタ部と、前記半導体基板のおもて面側に設けられ、かつ前記エミッタ電極に電気的に接続する第2導電型のアノード層、および前記半導体基板の裏面側に選択的に設けられ、かつ前記コレクタ電極に電気的に接続する第1導電型のカソード領域を備えた還流用ダイオード部と、を備えた半導体装置の製造方法であって、
前記半導体基板の裏面に第1導電型不純物を導入する導入工程と、
前記第1導電型不純物を熱処理により活性化させ、前記半導体基板の裏面から前記コレクタ領域よりも深い位置に、前記ドリフト層よりも不純物濃度が高い第1導電型のフィールドストップ層を形成する第1熱処理工程と、
前記半導体基板の裏面から軽イオンを照射し、前記ドリフト層内に他の領域よりもキャリアのライフタイムが短い第1低ライフタイム領域を形成する第1照射工程と、
前記半導体基板の裏面から軽イオンを照射し、前記フィールドストップ層内に他の領域よりもキャリアのライフタイムが短い第2低ライフタイム領域を形成する第2照射工程と、
前記第2照射工程で前記フィールドストップ層内に生じた欠陥の欠陥密度を熱処理により低減する第2熱処理工程と、
を含むことを特徴とする半導体装置の製造方法。 - 前記導入工程では、前記第1導電型不純物としてセレンを導入することを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記第2熱処理工程では、前記フィールドストップ層内に形成された欠陥の欠陥密度を低減するとともに、前記フィールドストップ層内の軽イオンをドナー化させることを特徴とする請求項1または2に記載の半導体装置の製造方法。
- 前記第2熱処理工程は、350℃〜370℃の温度で1時間〜2時間行うことを特徴とする請求項1〜3のいずれか一つに記載の半導体装置の製造方法。
- 前記第2低ライフタイム領域のライフタイムを、前記第1低ライフタイム領域のライフタイムよりも短くすることを特徴とする請求項1〜4のいずれか一つに記載の半導体装置の製造方法。
- 前記軽イオンは、ヘリウムまたはプロトンであることを特徴とする請求項1〜5のいずれか一つに記載の半導体装置の製造方法。
- 第1導電型のドリフト層を有する半導体基板、前記半導体基板のおもて面側に設けられた第2導電型のベース層、前記ベース層内に選択的に設けられた第1導電型のエミッタ領域、前記半導体基板のおもて面側に設けられたゲート絶縁膜およびゲート電極を備えた絶縁ゲート部、前記ベース層と前記エミッタ領域との両方に電気的に接続するエミッタ電極、前記半導体基板の裏面側に選択的に設けられた第2導電型のコレクタ領域、および前記コレクタ領域に電気的に接続するコレクタ電極を備えた絶縁ゲート型バイポーラトランジスタ部と、
前記半導体基板のおもて面側に設けられ、かつ前記エミッタ電極に電気的に接続する第2導電型のアノード層、および前記半導体基板の裏面側に選択的に設けられ、かつ前記コレクタ電極に電気的に接続する第1導電型のカソード領域を備えた還流用ダイオード部と、
前記半導体基板の裏面から前記コレクタ領域よりも深い位置に設けられた、前記ドリフト層よりも不純物濃度が高い第1導電型のフィールドストップ層と、
前記ドリフト層内に前記フィールドストップ層と離れて設けられた、他の領域よりもキャリアのライフタイムが短い第1低ライフタイム領域と、
前記フィールドストップ層内に設けられた、他の領域よりもキャリアのライフタイムが短い第2低ライフタイム領域と、
を備えることを特徴とする半導体装置。 - 前記フィールドストップ層は、ドーパントとしてセレンを含むことを特徴とする請求項7に記載の半導体装置。
- 前記第1低ライフタイム領域は、軽イオンを含むことを特徴とする請求項7または8に記載の半導体装置。
- 前記第2低ライフタイム領域は、軽イオンを含むことを特徴とする請求項7〜9のいずれか一つに記載の半導体装置。
- 前記第2低ライフタイム領域に、軽イオンがドナー化されてなる領域が設けられていることを特徴とする請求項10に記載の半導体装置。
- 前記軽イオンは、ヘリウムかプロトンであることを特徴とする請求項9〜11のいずれか一つに記載の半導体装置。
- 前記第2低ライフタイム領域のライフタイムは、前記第1低ライフタイム領域のライフタイムよりも短いことを特徴とする請求項7〜12のいずれか一つに記載の半導体装置。
- 前記絶縁ゲート部は、
前記ベース層および前記エミッタ領域を貫通して前記ドリフト層に達するトレンチと、
前記トレンチの内壁に沿って設けられた前記ゲート絶縁膜と、
前記トレンチの内部に、前記ゲート絶縁膜を介して設けられた前記ゲート電極と、
を備えることを特徴とする請求項7〜13のいずれか一つに記載の半導体装置。
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JP2022105112A (ja) * | 2018-10-18 | 2022-07-12 | 富士電機株式会社 | 半導体装置および製造方法 |
US11735424B2 (en) | 2018-10-18 | 2023-08-22 | Fuji Electric Co., Ltd. | Semiconductor device and manufacturing method thereof |
JP7487753B2 (ja) | 2018-10-18 | 2024-05-21 | 富士電機株式会社 | 半導体装置および製造方法 |
JP2022126856A (ja) * | 2018-12-28 | 2022-08-30 | 富士電機株式会社 | 半導体装置 |
JP7563425B2 (ja) | 2018-12-28 | 2024-10-08 | 富士電機株式会社 | 半導体装置 |
US11972950B2 (en) | 2018-12-28 | 2024-04-30 | Fuji Electric Co., Ltd. | Semiconductor device and method for manufacturing |
US11355595B2 (en) | 2019-01-18 | 2022-06-07 | Fuji Electric Co., Ltd. | Semiconductor device and method of manufacturing semiconductor device |
WO2020230900A1 (ja) * | 2019-05-16 | 2020-11-19 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
US11935945B2 (en) | 2019-05-16 | 2024-03-19 | Fuji Electric Co., Ltd. | Semiconductor device and manufacturing method of semiconductor device |
US12009268B2 (en) | 2019-06-17 | 2024-06-11 | Fuji Electric Co., Ltd. | Semiconductor device and fabrication method for semiconductor device |
DE112020003167T5 (de) | 2020-02-12 | 2022-06-30 | Fuji Electric Co., Ltd. | Halbleitervorrichtung und dessen herstellungsverfahren |
WO2024009591A1 (ja) * | 2022-07-07 | 2024-01-11 | ローム株式会社 | 半導体装置および半導体装置の製造方法 |
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