JP2014154800A - 配線基板及びその製造方法 - Google Patents

配線基板及びその製造方法 Download PDF

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Publication number
JP2014154800A
JP2014154800A JP2013025210A JP2013025210A JP2014154800A JP 2014154800 A JP2014154800 A JP 2014154800A JP 2013025210 A JP2013025210 A JP 2013025210A JP 2013025210 A JP2013025210 A JP 2013025210A JP 2014154800 A JP2014154800 A JP 2014154800A
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JP
Japan
Prior art keywords
layer
wiring
insulating layer
via hole
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2013025210A
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English (en)
Japanese (ja)
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JP2014154800A5 (enExample
Inventor
Noriyoshi Shimizu
規良 清水
Wataru Kaneda
渉 金田
Akio Mutsukawa
昭雄 六川
Toshinori Koyama
利徳 小山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2013025210A priority Critical patent/JP2014154800A/ja
Priority to US14/141,765 priority patent/US9455219B2/en
Publication of JP2014154800A publication Critical patent/JP2014154800A/ja
Publication of JP2014154800A5 publication Critical patent/JP2014154800A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/082—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts the openings being tapered via holes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/095—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers of vias therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2013025210A 2013-02-13 2013-02-13 配線基板及びその製造方法 Pending JP2014154800A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2013025210A JP2014154800A (ja) 2013-02-13 2013-02-13 配線基板及びその製造方法
US14/141,765 US9455219B2 (en) 2013-02-13 2013-12-27 Wiring substrate and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013025210A JP2014154800A (ja) 2013-02-13 2013-02-13 配線基板及びその製造方法

Publications (2)

Publication Number Publication Date
JP2014154800A true JP2014154800A (ja) 2014-08-25
JP2014154800A5 JP2014154800A5 (enExample) 2016-01-28

Family

ID=51296947

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013025210A Pending JP2014154800A (ja) 2013-02-13 2013-02-13 配線基板及びその製造方法

Country Status (2)

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US (1) US9455219B2 (enExample)
JP (1) JP2014154800A (enExample)

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016127248A (ja) * 2015-01-08 2016-07-11 日本特殊陶業株式会社 多層配線基板
JP2017050310A (ja) * 2015-08-31 2017-03-09 新光電気工業株式会社 電子部品装置及びその製造方法
WO2017043375A1 (ja) * 2015-09-08 2017-03-16 東レ株式会社 感光性樹脂組成物、感光性シート、半導体装置および半導体装置の製造方法
WO2017073481A1 (ja) * 2015-10-28 2017-05-04 東レ株式会社 ポジ型感光性樹脂組成物、感光性シート、硬化膜、層間絶縁膜、半導体保護膜、半導体装置の製造方法、半導体電子部品および半導体装置
WO2017170032A1 (ja) * 2016-03-28 2017-10-05 東レ株式会社 感光性フィルム
KR20190011125A (ko) * 2017-07-24 2019-02-01 삼성전자주식회사 반도체 패키지 및 이의 제조 방법
CN109561569A (zh) * 2017-09-27 2019-04-02 揖斐电株式会社 印刷布线板
JP2019125709A (ja) * 2018-01-17 2019-07-25 新光電気工業株式会社 配線基板及びその製造方法と電子部品装置
KR20190093191A (ko) * 2016-12-30 2019-08-08 인텔 코포레이션 팬 아웃 스케일링을 위한 필러 및 비아 접속부를 구비한 고밀도 상호접촉 층을 가진 패키지 기판
JP2020521347A (ja) * 2017-04-21 2020-07-16 フラウンホーファー−ゲゼルシャフト・ツール・フェルデルング・デル・アンゲヴァンテン・フォルシュング・アインゲトラーゲネル・フェライン 流体の体積流量と相互作用するｍｅｍｓトランスデューサ、およびその製造方法
US10804191B2 (en) 2017-10-11 2020-10-13 Ibiden Co., Ltd. Printed wiring board
US11088081B2 (en) 2018-10-02 2021-08-10 Samsung Electronics Co., Ltd. Semiconductor package having a connection structure with tapering connection via layers
US11177205B2 (en) 2018-12-18 2021-11-16 Samsung Electronics Co., Ltd. Semiconductor package having multi-level and multi-directional shape narrowing vias
JP2022124091A (ja) * 2021-02-15 2022-08-25 凸版印刷株式会社 配線基板積層体
JP2022545091A (ja) * 2019-08-19 2022-10-25 アトテック ドイチェランド ゲーエムベーハー ウント コ カーゲー 銅で充填されたマイクロビアを含む高密度相互接続プリント回路基板の製造方法
JP2023140444A (ja) * 2022-03-23 2023-10-05 日本電気株式会社 量子デバイス
JP2024001328A (ja) * 2019-05-31 2024-01-09 コネクトフリー株式会社 ソフトウェア開発装置およびソフトウェア開発プログラム

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9252110B2 (en) 2014-01-17 2016-02-02 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structure and method of forming same
JP6133227B2 (ja) * 2014-03-27 2017-05-24 新光電気工業株式会社 配線基板及びその製造方法
TWI566305B (zh) * 2014-10-29 2017-01-11 巨擘科技股份有限公司 製造三維積體電路的方法
US10504874B2 (en) * 2016-08-01 2019-12-10 Taiwan Semiconductor Manufacturing Company Limited Structures and methods for providing electrical isolation in semiconductor devices
CN112289688B (zh) * 2019-07-22 2024-05-07 盛合晶微半导体(江阴)有限公司 一种重新布线层的制备方法
KR102706158B1 (ko) 2019-08-30 2024-09-11 삼성전자주식회사 반도체 패키지 제조 방법
KR102906435B1 (ko) 2020-10-07 2026-01-02 삼성전자주식회사 반도체 패키지
US12148688B2 (en) * 2023-02-13 2024-11-19 Dyi-chung Hu Semiconductor substrate and manufacturing method thereof

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JP2007234889A (ja) * 2006-03-01 2007-09-13 Shinko Electric Ind Co Ltd 配線の形成方法
WO2010010910A1 (ja) * 2008-07-23 2010-01-28 日本電気株式会社 コアレス配線基板、半導体装置及びそれらの製造方法
JP2010157690A (ja) * 2008-12-29 2010-07-15 Ibiden Co Ltd 電子部品実装用基板及び電子部品実装用基板の製造方法
JP2011014847A (ja) * 2009-07-06 2011-01-20 Shinko Electric Ind Co Ltd 多層配線基板
WO2011089936A1 (ja) * 2010-01-22 2011-07-28 日本電気株式会社 機能素子内蔵基板及び配線基板

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US6573822B2 (en) * 2001-06-18 2003-06-03 Intel Corporation Tunable inductor using microelectromechanical switches
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US6818469B2 (en) * 2002-05-27 2004-11-16 Nec Corporation Thin film capacitor, method for manufacturing the same and printed circuit board incorporating the same
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JP2007234889A (ja) * 2006-03-01 2007-09-13 Shinko Electric Ind Co Ltd 配線の形成方法
WO2010010910A1 (ja) * 2008-07-23 2010-01-28 日本電気株式会社 コアレス配線基板、半導体装置及びそれらの製造方法
JP2010157690A (ja) * 2008-12-29 2010-07-15 Ibiden Co Ltd 電子部品実装用基板及び電子部品実装用基板の製造方法
JP2011014847A (ja) * 2009-07-06 2011-01-20 Shinko Electric Ind Co Ltd 多層配線基板
WO2011089936A1 (ja) * 2010-01-22 2011-07-28 日本電気株式会社 機能素子内蔵基板及び配線基板

Cited By (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016127248A (ja) * 2015-01-08 2016-07-11 日本特殊陶業株式会社 多層配線基板
JP2017050310A (ja) * 2015-08-31 2017-03-09 新光電気工業株式会社 電子部品装置及びその製造方法
WO2017043375A1 (ja) * 2015-09-08 2017-03-16 東レ株式会社 感光性樹脂組成物、感光性シート、半導体装置および半導体装置の製造方法
WO2017073481A1 (ja) * 2015-10-28 2017-05-04 東レ株式会社 ポジ型感光性樹脂組成物、感光性シート、硬化膜、層間絶縁膜、半導体保護膜、半導体装置の製造方法、半導体電子部品および半導体装置
WO2017170032A1 (ja) * 2016-03-28 2017-10-05 東レ株式会社 感光性フィルム
JPWO2017170032A1 (ja) * 2016-03-28 2019-02-07 東レ株式会社 感光性フィルム
KR102596788B1 (ko) * 2016-12-30 2023-10-31 인텔 코포레이션 팬 아웃 스케일링을 위한 필러 및 비아 접속부를 구비한 고밀도 상호접속 층을 가진 패키지 기판
KR20190093191A (ko) * 2016-12-30 2019-08-08 인텔 코포레이션 팬 아웃 스케일링을 위한 필러 및 비아 접속부를 구비한 고밀도 상호접촉 층을 가진 패키지 기판
JP2020521347A (ja) * 2017-04-21 2020-07-16 フラウンホーファー−ゲゼルシャフト・ツール・フェルデルング・デル・アンゲヴァンテン・フォルシュング・アインゲトラーゲネル・フェライン 流体の体積流量と相互作用するｍｅｍｓトランスデューサ、およびその製造方法
US11554950B2 (en) 2017-04-21 2023-01-17 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. MEMS transducer for interacting with a volume flow of a fluid, and method of producing same
KR102412613B1 (ko) * 2017-07-24 2022-06-23 삼성전자주식회사 반도체 패키지 및 이의 제조 방법
KR20190011125A (ko) * 2017-07-24 2019-02-01 삼성전자주식회사 반도체 패키지 및 이의 제조 방법
CN109561569A (zh) * 2017-09-27 2019-04-02 揖斐电株式会社 印刷布线板
CN109561569B (zh) * 2017-09-27 2023-12-29 揖斐电株式会社 印刷布线板
US10804191B2 (en) 2017-10-11 2020-10-13 Ibiden Co., Ltd. Printed wiring board
JP2019125709A (ja) * 2018-01-17 2019-07-25 新光電気工業株式会社 配線基板及びその製造方法と電子部品装置
JP7032148B2 (ja) 2018-01-17 2022-03-08 新光電気工業株式会社 配線基板及びその製造方法と電子部品装置
US11088081B2 (en) 2018-10-02 2021-08-10 Samsung Electronics Co., Ltd. Semiconductor package having a connection structure with tapering connection via layers
US11670518B2 (en) 2018-10-02 2023-06-06 Samsung Electronics Co., Ltd. Method of manufacturing semiconductor package having connection structure with tapering connection via layers
US11177205B2 (en) 2018-12-18 2021-11-16 Samsung Electronics Co., Ltd. Semiconductor package having multi-level and multi-directional shape narrowing vias
US11967549B2 (en) 2018-12-18 2024-04-23 Samsung Electronics Co., Ltd. Semiconductor package
JP7630066B2 (ja) 2019-05-31 2025-02-17 久利寿 帝都 ソフトウェア開発装置およびソフトウェア開発プログラム
JP2024001328A (ja) * 2019-05-31 2024-01-09 コネクトフリー株式会社 ソフトウェア開発装置およびソフトウェア開発プログラム
JP2025032310A (ja) * 2019-05-31 2025-03-11 久利寿 帝都 ソフトウェア開発装置およびソフトウェア開発プログラム
US12393409B2 (en) 2019-05-31 2025-08-19 Connectfree Corporation Software development device and software development program
JP7794409B2 (ja) 2019-05-31 2026-01-06 久利寿 帝都 ソフトウェア開発装置、ソフトウェア開発プログラムおよびソフトウェア開発方法
JP2022545091A (ja) * 2019-08-19 2022-10-25 アトテック ドイチェランド ゲーエムベーハー ウント コ カーゲー 銅で充填されたマイクロビアを含む高密度相互接続プリント回路基板の製造方法
JP2022124091A (ja) * 2021-02-15 2022-08-25 凸版印刷株式会社 配線基板積層体
JP7676800B2 (ja) 2021-02-15 2025-05-15 Ｔｏｐｐａｎホールディングス株式会社 配線基板積層体
JP2023140444A (ja) * 2022-03-23 2023-10-05 日本電気株式会社 量子デバイス

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