JP2014042239A5 - - Google Patents

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Publication number
JP2014042239A5
JP2014042239A5 JP2013167396A JP2013167396A JP2014042239A5 JP 2014042239 A5 JP2014042239 A5 JP 2014042239A5 JP 2013167396 A JP2013167396 A JP 2013167396A JP 2013167396 A JP2013167396 A JP 2013167396A JP 2014042239 A5 JP2014042239 A5 JP 2014042239A5
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JP
Japan
Prior art keywords
terminal
fet
voltage
state
signal
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JP2013167396A
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English (en)
Japanese (ja)
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JP6440348B2 (ja
JP2014042239A (ja
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Priority claimed from US13/587,590 external-priority patent/US8729952B2/en
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JP2013167396A 2012-08-16 2013-08-12 非負バイアスの切替装置 Active JP6440348B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/587,590 2012-08-16
US13/587,590 US8729952B2 (en) 2012-08-16 2012-08-16 Switching device with non-negative biasing

Publications (3)

Publication Number Publication Date
JP2014042239A JP2014042239A (ja) 2014-03-06
JP2014042239A5 true JP2014042239A5 (enExample) 2016-07-21
JP6440348B2 JP6440348B2 (ja) 2018-12-19

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Application Number Title Priority Date Filing Date
JP2013167396A Active JP6440348B2 (ja) 2012-08-16 2013-08-12 非負バイアスの切替装置

Country Status (7)

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US (1) US8729952B2 (enExample)
JP (1) JP6440348B2 (enExample)
KR (1) KR102031993B1 (enExample)
CN (1) CN103595381B (enExample)
FR (1) FR2994621A1 (enExample)
IL (1) IL227881A (enExample)
TW (1) TWI604694B (enExample)

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