JP2013534731A5 - - Google Patents

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Publication number
JP2013534731A5
JP2013534731A5 JP2013517642A JP2013517642A JP2013534731A5 JP 2013534731 A5 JP2013534731 A5 JP 2013534731A5 JP 2013517642 A JP2013517642 A JP 2013517642A JP 2013517642 A JP2013517642 A JP 2013517642A JP 2013534731 A5 JP2013534731 A5 JP 2013534731A5
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JP
Japan
Prior art keywords
silicon
wafer
cleavage plane
insulator wafer
chamber
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JP2013517642A
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English (en)
Japanese (ja)
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JP5989642B2 (ja
JP2013534731A (ja
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Priority claimed from PCT/IB2011/052903 external-priority patent/WO2012001659A2/en
Publication of JP2013534731A publication Critical patent/JP2013534731A/ja
Publication of JP2013534731A5 publication Critical patent/JP2013534731A5/ja
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JP2013517642A 2010-06-30 2011-06-30 シリコン・オン・インシュレータウエハをインサイチュで不導体化する方法 Active JP5989642B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US35999810P 2010-06-30 2010-06-30
US61/359,998 2010-06-30
PCT/IB2011/052903 WO2012001659A2 (en) 2010-06-30 2011-06-30 Methods for in-situ passivation of silicon-on-insulator wafers

Publications (3)

Publication Number Publication Date
JP2013534731A JP2013534731A (ja) 2013-09-05
JP2013534731A5 true JP2013534731A5 (enExample) 2014-08-14
JP5989642B2 JP5989642B2 (ja) 2016-09-07

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JP2013517642A Active JP5989642B2 (ja) 2010-06-30 2011-06-30 シリコン・オン・インシュレータウエハをインサイチュで不導体化する方法

Country Status (8)

Country Link
US (1) US8859393B2 (enExample)
EP (1) EP2589075A2 (enExample)
JP (1) JP5989642B2 (enExample)
KR (3) KR102083688B1 (enExample)
CN (1) CN102959697A (enExample)
SG (1) SG186853A1 (enExample)
TW (1) TW201216414A (enExample)
WO (1) WO2012001659A2 (enExample)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102427097B (zh) * 2011-11-23 2014-05-07 中国科学院物理研究所 一种硅的氧化钝化方法及钝化装置
US8747598B2 (en) 2012-04-25 2014-06-10 Gtat Corporation Method of forming a permanently supported lamina
KR102294812B1 (ko) 2014-01-23 2021-08-31 글로벌웨이퍼스 씨오., 엘티디. 고 비저항 soi 웨이퍼 및 그 제조 방법
US9853133B2 (en) * 2014-09-04 2017-12-26 Sunedison Semiconductor Limited (Uen201334164H) Method of manufacturing high resistivity silicon-on-insulator substrate
US9899499B2 (en) 2014-09-04 2018-02-20 Sunedison Semiconductor Limited (Uen201334164H) High resistivity silicon-on-insulator wafer manufacturing method for reducing substrate loss
US10381260B2 (en) 2014-11-18 2019-08-13 GlobalWafers Co., Inc. Method of manufacturing high resistivity semiconductor-on-insulator wafers with charge trapping layers
EP3221885B1 (en) 2014-11-18 2019-10-23 GlobalWafers Co., Ltd. High resistivity semiconductor-on-insulator wafer and a method of manufacturing
WO2016081367A1 (en) 2014-11-18 2016-05-26 Sunedison Semiconductor Limited HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE COMPRISING A CHARGE TRAPPING LAYER FORMED BY He-N2 CO-IMPLANTATION
EP4120320A1 (en) 2015-03-03 2023-01-18 GlobalWafers Co., Ltd. Charge trapping polycrystalline silicon films on silicon substrates with controllable film stress
WO2016149113A1 (en) 2015-03-17 2016-09-22 Sunedison Semiconductor Limited Thermally stable charge trapping layer for use in manufacture of semiconductor-on-insulator structures
US9881832B2 (en) 2015-03-17 2018-01-30 Sunedison Semiconductor Limited (Uen201334164H) Handle substrate for use in manufacture of semiconductor-on-insulator structure and method of manufacturing thereof
US10332782B2 (en) 2015-06-01 2019-06-25 Globalwafers Co., Ltd. Method of manufacturing silicon germanium-on-insulator
US10304722B2 (en) 2015-06-01 2019-05-28 Globalwafers Co., Ltd. Method of manufacturing semiconductor-on-insulator
CN108780776B (zh) 2015-11-20 2023-09-29 环球晶圆股份有限公司 使半导体表面平整的制造方法
US10468294B2 (en) 2016-02-19 2019-11-05 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed on a substrate with a rough surface
US9831115B2 (en) 2016-02-19 2017-11-28 Sunedison Semiconductor Limited (Uen201334164H) Process flow for manufacturing semiconductor on insulator structures in parallel
WO2017142849A1 (en) 2016-02-19 2017-08-24 Sunedison Semiconductor Limited Semiconductor on insulator structure comprising a buried high resistivity layer
US11114332B2 (en) 2016-03-07 2021-09-07 Globalwafers Co., Ltd. Semiconductor on insulator structure comprising a plasma nitride layer and method of manufacture thereof
WO2017155806A1 (en) 2016-03-07 2017-09-14 Sunedison Semiconductor Limited Semiconductor on insulator structure comprising a plasma oxide layer and method of manufacture thereof
US10593748B2 (en) 2016-03-07 2020-03-17 Globalwafers Co., Ltd. Semiconductor on insulator structure comprising a low temperature flowable oxide layer and method of manufacture thereof
US11848227B2 (en) 2016-03-07 2023-12-19 Globalwafers Co., Ltd. Method of manufacturing a semiconductor on insulator structure by a pressurized bond treatment
CN111201341B (zh) 2016-06-08 2023-04-04 环球晶圆股份有限公司 具有经改进的机械强度的高电阻率单晶硅锭及晶片
US10269617B2 (en) 2016-06-22 2019-04-23 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising an isolation region
JP6831911B2 (ja) 2016-10-26 2021-02-17 グローバルウェーハズ カンパニー リミテッドGlobalWafers Co.,Ltd. 向上した電荷捕獲効率を有する高抵抗率シリコンオンインシュレータ基板
JP6801105B2 (ja) 2016-12-05 2020-12-16 グローバルウェーハズ カンパニー リミテッドGlobalWafers Co.,Ltd. 高抵抗シリコンオンインシュレータ構造及びその製造方法
KR102306730B1 (ko) 2016-12-28 2021-09-30 썬에디슨 세미컨덕터 리미티드 고유 게터링 및 게이트 산화물 무결성 수율을 갖도록 규소 웨이퍼들을 처리하는 방법
FR3061988B1 (fr) * 2017-01-13 2019-11-01 Soitec Procede de lissage de surface d'un substrat semiconducteur sur isolant
CN117038572A (zh) 2017-07-14 2023-11-10 太阳能爱迪生半导体有限公司 绝缘体上半导体结构的制造方法
US10916416B2 (en) * 2017-11-14 2021-02-09 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor wafer with modified surface and fabrication method thereof
EP3785293B1 (en) 2018-04-27 2023-06-07 GlobalWafers Co., Ltd. Light assisted platelet formation facilitating layer transfer from a semiconductor donor substrate
KR102463727B1 (ko) 2018-06-08 2022-11-07 글로벌웨이퍼스 씨오., 엘티디. 얇은 실리콘 층의 전사 방법
US11296277B2 (en) 2018-10-16 2022-04-05 Samsung Electronics Co., Ltd. Variable resistance memory device having an anti-oxidation layer and a method of manufacturing the same

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3836786A (en) * 1967-01-04 1974-09-17 Purification Sciences Inc Dielectric liquid-immersed corona generator
CA1030102A (en) 1972-08-17 1978-04-25 Purification Sciences Inc. Dielectric liquid-immersed corona generator
US5000113A (en) * 1986-12-19 1991-03-19 Applied Materials, Inc. Thermal CVD/PECVD reactor and use for thermal chemical vapor deposition of silicon dioxide and in-situ multi-step planarized process
JPH07118522B2 (ja) * 1990-10-24 1995-12-18 インターナショナル・ビジネス・マシーンズ・コーポレイション 基板表面を酸化処理するための方法及び半導体の構造
JPH05259153A (ja) * 1992-03-12 1993-10-08 Fujitsu Ltd シリコン酸化膜の製造方法と製造装置
JPH0766195A (ja) * 1993-06-29 1995-03-10 Sumitomo Sitix Corp シリコンウェーハの表面酸化膜形成方法
CN1104264A (zh) * 1994-09-02 1995-06-28 复旦大学 热壁密装低温低压淀积二氧化硅薄膜技术
US5880029A (en) * 1996-12-27 1999-03-09 Motorola, Inc. Method of passivating semiconductor devices and the passivated devices
US5972802A (en) * 1997-10-07 1999-10-26 Seh America, Inc. Prevention of edge stain in silicon wafers by ozone dipping
JP3153162B2 (ja) * 1997-10-08 2001-04-03 松下電子工業株式会社 シリコン酸化膜の形成方法
JP4379943B2 (ja) * 1999-04-07 2009-12-09 株式会社デンソー 半導体基板の製造方法および半導体基板製造装置
US20020175143A1 (en) * 2001-05-22 2002-11-28 Seh America, Inc. Processes for polishing wafers
US6833322B2 (en) 2002-10-17 2004-12-21 Applied Materials, Inc. Apparatuses and methods for depositing an oxide film
JP4614416B2 (ja) 2003-05-29 2011-01-19 日東電工株式会社 半導体チップの製造方法およびダイシング用シート貼付け装置
JP2007149723A (ja) * 2005-11-24 2007-06-14 Sumco Corp 貼り合わせウェーハの製造方法
US7939424B2 (en) * 2007-09-21 2011-05-10 Varian Semiconductor Equipment Associates, Inc. Wafer bonding activated by ion implantation
SG161151A1 (en) 2008-10-22 2010-05-27 Semiconductor Energy Lab Soi substrate and method for manufacturing the same
EP2368264A1 (en) 2008-11-26 2011-09-28 MEMC Electronic Materials, Inc. Method for processing a silicon-on-insulator structure

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