SG186853A1 - Methods for in-situ passivation of silicon-on-insulator wafers - Google Patents

Methods for in-situ passivation of silicon-on-insulator wafers Download PDF

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Publication number
SG186853A1
SG186853A1 SG2012096020A SG2012096020A SG186853A1 SG 186853 A1 SG186853 A1 SG 186853A1 SG 2012096020 A SG2012096020 A SG 2012096020A SG 2012096020 A SG2012096020 A SG 2012096020A SG 186853 A1 SG186853 A1 SG 186853A1
Authority
SG
Singapore
Prior art keywords
wafer
chamber
silicon
cleaved
cleaved surface
Prior art date
Application number
SG2012096020A
Other languages
English (en)
Inventor
Michael J Ries
Dale A Wittle
Anca Stefanescu
Andrew M Jones
Original Assignee
Memc Electronic Materials
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Memc Electronic Materials filed Critical Memc Electronic Materials
Publication of SG186853A1 publication Critical patent/SG186853A1/en

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19Preparing inhomogeneous wafers
    • H10P90/1904Preparing vertically inhomogeneous wafers
    • H10P90/1906Preparing SOI wafers
    • H10P90/1914Preparing SOI wafers using bonding
    • H10P90/1916Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/11Separation of active layers from substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • H10W10/181Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

Landscapes

  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)
SG2012096020A 2010-06-30 2011-06-30 Methods for in-situ passivation of silicon-on-insulator wafers SG186853A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US35999810P 2010-06-30 2010-06-30
PCT/IB2011/052903 WO2012001659A2 (en) 2010-06-30 2011-06-30 Methods for in-situ passivation of silicon-on-insulator wafers

Publications (1)

Publication Number Publication Date
SG186853A1 true SG186853A1 (en) 2013-02-28

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
SG2012096020A SG186853A1 (en) 2010-06-30 2011-06-30 Methods for in-situ passivation of silicon-on-insulator wafers

Country Status (8)

Country Link
US (1) US8859393B2 (enExample)
EP (1) EP2589075A2 (enExample)
JP (1) JP5989642B2 (enExample)
KR (3) KR102083688B1 (enExample)
CN (1) CN102959697A (enExample)
SG (1) SG186853A1 (enExample)
TW (1) TW201216414A (enExample)
WO (1) WO2012001659A2 (enExample)

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US9853133B2 (en) * 2014-09-04 2017-12-26 Sunedison Semiconductor Limited (Uen201334164H) Method of manufacturing high resistivity silicon-on-insulator substrate
US9899499B2 (en) 2014-09-04 2018-02-20 Sunedison Semiconductor Limited (Uen201334164H) High resistivity silicon-on-insulator wafer manufacturing method for reducing substrate loss
WO2016081367A1 (en) 2014-11-18 2016-05-26 Sunedison Semiconductor Limited HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE COMPRISING A CHARGE TRAPPING LAYER FORMED BY He-N2 CO-IMPLANTATION
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JP6726180B2 (ja) 2014-11-18 2020-07-22 グローバルウェーハズ カンパニー リミテッドGlobalWafers Co.,Ltd. 高抵抗率半導体・オン・インシュレータウエハおよび製造方法
EP4120320A1 (en) 2015-03-03 2023-01-18 GlobalWafers Co., Ltd. Charge trapping polycrystalline silicon films on silicon substrates with controllable film stress
CN107408532A (zh) 2015-03-17 2017-11-28 太阳能爱迪生半导体有限公司 用于绝缘体上半导体结构的制造的热稳定电荷捕获层
US9881832B2 (en) 2015-03-17 2018-01-30 Sunedison Semiconductor Limited (Uen201334164H) Handle substrate for use in manufacture of semiconductor-on-insulator structure and method of manufacturing thereof
CN107873106B (zh) 2015-06-01 2022-03-18 环球晶圆股份有限公司 制造绝缘体上硅锗的方法
WO2016196060A1 (en) 2015-06-01 2016-12-08 Sunedison Semiconductor Limited A method of manufacturing semiconductor-on-insulator
JP6749394B2 (ja) 2015-11-20 2020-09-02 グローバルウェーハズ カンパニー リミテッドGlobalWafers Co.,Ltd. 滑らかな半導体表面の製造方法
US10468294B2 (en) 2016-02-19 2019-11-05 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed on a substrate with a rough surface
US10622247B2 (en) 2016-02-19 2020-04-14 Globalwafers Co., Ltd. Semiconductor on insulator structure comprising a buried high resistivity layer
US9831115B2 (en) 2016-02-19 2017-11-28 Sunedison Semiconductor Limited (Uen201334164H) Process flow for manufacturing semiconductor on insulator structures in parallel
EP3758050A1 (en) 2016-03-07 2020-12-30 GlobalWafers Co., Ltd. Semiconductor on insulator structure comprising a low temperature flowable oxide layer and method of manufacture thereof
WO2017155804A1 (en) 2016-03-07 2017-09-14 Sunedison Semiconductor Limited Method of manufacturing a semiconductor on insulator structure by a pressurized bond treatment
US11114332B2 (en) 2016-03-07 2021-09-07 Globalwafers Co., Ltd. Semiconductor on insulator structure comprising a plasma nitride layer and method of manufacture thereof
WO2017155806A1 (en) 2016-03-07 2017-09-14 Sunedison Semiconductor Limited Semiconductor on insulator structure comprising a plasma oxide layer and method of manufacture thereof
CN111201341B (zh) 2016-06-08 2023-04-04 环球晶圆股份有限公司 具有经改进的机械强度的高电阻率单晶硅锭及晶片
US10269617B2 (en) 2016-06-22 2019-04-23 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising an isolation region
EP4723861A2 (en) 2016-10-26 2026-04-08 GlobalWafers Co., Ltd. High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency
CN115714130A (zh) 2016-12-05 2023-02-24 环球晶圆股份有限公司 高电阻率绝缘体上硅结构及其制造方法
CN114093764B (zh) 2016-12-28 2025-07-22 太阳能爱迪生半导体有限公司 单晶硅晶片
FR3061988B1 (fr) * 2017-01-13 2019-11-01 Soitec Procede de lissage de surface d'un substrat semiconducteur sur isolant
SG11201913769RA (en) 2017-07-14 2020-01-30 Sunedison Semiconductor Ltd Method of manufacture of a semiconductor on insulator structure
US10916416B2 (en) 2017-11-14 2021-02-09 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor wafer with modified surface and fabrication method thereof
JP7160943B2 (ja) 2018-04-27 2022-10-25 グローバルウェーハズ カンパニー リミテッド 半導体ドナー基板からの層移転を容易にする光アシスト板状体形成
EP4210092A1 (en) 2018-06-08 2023-07-12 GlobalWafers Co., Ltd. Method for transfer of a thin layer of silicon
US11296277B2 (en) 2018-10-16 2022-04-05 Samsung Electronics Co., Ltd. Variable resistance memory device having an anti-oxidation layer and a method of manufacturing the same

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Also Published As

Publication number Publication date
JP5989642B2 (ja) 2016-09-07
WO2012001659A2 (en) 2012-01-05
TW201216414A (en) 2012-04-16
KR20180037326A (ko) 2018-04-11
JP2013534731A (ja) 2013-09-05
EP2589075A2 (en) 2013-05-08
KR102083688B1 (ko) 2020-03-02
US8859393B2 (en) 2014-10-14
KR20130129897A (ko) 2013-11-29
US20120003814A1 (en) 2012-01-05
CN102959697A (zh) 2013-03-06
KR20190087668A (ko) 2019-07-24
WO2012001659A3 (en) 2012-03-01

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