JP5989642B2 - シリコン・オン・インシュレータウエハをインサイチュで不導体化する方法 - Google Patents

シリコン・オン・インシュレータウエハをインサイチュで不導体化する方法 Download PDF

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JP5989642B2
JP5989642B2 JP2013517642A JP2013517642A JP5989642B2 JP 5989642 B2 JP5989642 B2 JP 5989642B2 JP 2013517642 A JP2013517642 A JP 2013517642A JP 2013517642 A JP2013517642 A JP 2013517642A JP 5989642 B2 JP5989642 B2 JP 5989642B2
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wafer
chamber
silicon
cleaved
cleaved surface
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JP2013534731A5 (enExample
JP2013534731A (ja
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マイケル・ジェイ・リーズ
デール・エイ・ウィトル
アンカ・ステファネスク
アンドリュー・エム・ジョーンズ
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SunEdison Inc
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SunEdison Inc
MEMC Electronic Materials Inc
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    • H10P90/1916—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H10P95/11—
    • H10W10/181—

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)
JP2013517642A 2010-06-30 2011-06-30 シリコン・オン・インシュレータウエハをインサイチュで不導体化する方法 Active JP5989642B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US35999810P 2010-06-30 2010-06-30
US61/359,998 2010-06-30
PCT/IB2011/052903 WO2012001659A2 (en) 2010-06-30 2011-06-30 Methods for in-situ passivation of silicon-on-insulator wafers

Publications (3)

Publication Number Publication Date
JP2013534731A JP2013534731A (ja) 2013-09-05
JP2013534731A5 JP2013534731A5 (enExample) 2014-08-14
JP5989642B2 true JP5989642B2 (ja) 2016-09-07

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JP2013517642A Active JP5989642B2 (ja) 2010-06-30 2011-06-30 シリコン・オン・インシュレータウエハをインサイチュで不導体化する方法

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US (1) US8859393B2 (enExample)
EP (1) EP2589075A2 (enExample)
JP (1) JP5989642B2 (enExample)
KR (3) KR102083688B1 (enExample)
CN (1) CN102959697A (enExample)
SG (1) SG186853A1 (enExample)
TW (1) TW201216414A (enExample)
WO (1) WO2012001659A2 (enExample)

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US9853133B2 (en) * 2014-09-04 2017-12-26 Sunedison Semiconductor Limited (Uen201334164H) Method of manufacturing high resistivity silicon-on-insulator substrate
EP3221884B1 (en) 2014-11-18 2022-06-01 GlobalWafers Co., Ltd. High resistivity semiconductor-on-insulator wafers with charge trapping layers and method of manufacturing thereof
EP4170705A3 (en) 2014-11-18 2023-10-18 GlobalWafers Co., Ltd. High resistivity semiconductor-on-insulator wafer and a method of manufacturing
US10224233B2 (en) 2014-11-18 2019-03-05 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed by He-N2 co-implantation
EP3367424B1 (en) 2015-03-03 2022-10-19 GlobalWafers Co., Ltd. Charge trapping polycrystalline silicon films on silicon substrates with controllable film stress
WO2016149113A1 (en) 2015-03-17 2016-09-22 Sunedison Semiconductor Limited Thermally stable charge trapping layer for use in manufacture of semiconductor-on-insulator structures
US9881832B2 (en) 2015-03-17 2018-01-30 Sunedison Semiconductor Limited (Uen201334164H) Handle substrate for use in manufacture of semiconductor-on-insulator structure and method of manufacturing thereof
EP3739620B1 (en) 2015-06-01 2022-02-16 GlobalWafers Co., Ltd. A silicon germanium-on-insulator structure
CN107667416B (zh) 2015-06-01 2021-08-31 环球晶圆股份有限公司 制造绝缘体上半导体的方法
SG10201913407TA (en) 2015-11-20 2020-03-30 Globalwafers Co Ltd Manufacturing method of smoothing a semiconductor surface
US10468294B2 (en) 2016-02-19 2019-11-05 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed on a substrate with a rough surface
US9831115B2 (en) 2016-02-19 2017-11-28 Sunedison Semiconductor Limited (Uen201334164H) Process flow for manufacturing semiconductor on insulator structures in parallel
WO2017142849A1 (en) 2016-02-19 2017-08-24 Sunedison Semiconductor Limited Semiconductor on insulator structure comprising a buried high resistivity layer
JP7002456B2 (ja) 2016-03-07 2022-01-20 グローバルウェーハズ カンパニー リミテッド 低温流動性酸化物層を含む半導体オンインシュレータ構造およびその製造方法
US11848227B2 (en) 2016-03-07 2023-12-19 Globalwafers Co., Ltd. Method of manufacturing a semiconductor on insulator structure by a pressurized bond treatment
WO2017155808A1 (en) 2016-03-07 2017-09-14 Sunedison Semiconductor Limited Semiconductor on insulator structure comprising a plasma nitride layer and method of manufacture thereof
WO2017155806A1 (en) 2016-03-07 2017-09-14 Sunedison Semiconductor Limited Semiconductor on insulator structure comprising a plasma oxide layer and method of manufacture thereof
SG11201810486VA (en) 2016-06-08 2018-12-28 Globalwafers Co Ltd High resistivity single crystal silicon ingot and wafer having improved mechanical strength
US10269617B2 (en) 2016-06-22 2019-04-23 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising an isolation region
CN110178211B (zh) 2016-10-26 2022-12-13 环球晶圆股份有限公司 具有增强电荷俘获效率的高电阻率绝缘体上硅衬底
US10468295B2 (en) 2016-12-05 2019-11-05 GlobalWafers Co. Ltd. High resistivity silicon-on-insulator structure and method of manufacture thereof
EP3653761B1 (en) 2016-12-28 2024-02-28 Sunedison Semiconductor Limited Silicon wafers with intrinsic gettering and gate oxide integrity yield
FR3061988B1 (fr) * 2017-01-13 2019-11-01 Soitec Procede de lissage de surface d'un substrat semiconducteur sur isolant
JP7034186B2 (ja) 2017-07-14 2022-03-11 サンエディソン・セミコンダクター・リミテッド 絶縁体上半導体構造の製造方法
US10916416B2 (en) * 2017-11-14 2021-02-09 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor wafer with modified surface and fabrication method thereof
JP7160943B2 (ja) 2018-04-27 2022-10-25 グローバルウェーハズ カンパニー リミテッド 半導体ドナー基板からの層移転を容易にする光アシスト板状体形成
EP4210092A1 (en) 2018-06-08 2023-07-12 GlobalWafers Co., Ltd. Method for transfer of a thin layer of silicon
US11296277B2 (en) 2018-10-16 2022-04-05 Samsung Electronics Co., Ltd. Variable resistance memory device having an anti-oxidation layer and a method of manufacturing the same

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Also Published As

Publication number Publication date
KR20130129897A (ko) 2013-11-29
KR20180037326A (ko) 2018-04-11
TW201216414A (en) 2012-04-16
KR102083688B1 (ko) 2020-03-02
CN102959697A (zh) 2013-03-06
KR20190087668A (ko) 2019-07-24
US8859393B2 (en) 2014-10-14
SG186853A1 (en) 2013-02-28
WO2012001659A3 (en) 2012-03-01
US20120003814A1 (en) 2012-01-05
EP2589075A2 (en) 2013-05-08
JP2013534731A (ja) 2013-09-05
WO2012001659A2 (en) 2012-01-05

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