CN102959697A - 绝缘体上硅晶片的原位钝化方法 - Google Patents

绝缘体上硅晶片的原位钝化方法 Download PDF

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Publication number
CN102959697A
CN102959697A CN2011800328260A CN201180032826A CN102959697A CN 102959697 A CN102959697 A CN 102959697A CN 2011800328260 A CN2011800328260 A CN 2011800328260A CN 201180032826 A CN201180032826 A CN 201180032826A CN 102959697 A CN102959697 A CN 102959697A
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CN
China
Prior art keywords
wafer
chamber
splitting
silicon
splitting surface
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Pending
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CN2011800328260A
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English (en)
Chinese (zh)
Inventor
M·J·里斯
D·A·怀特勒
A·斯坦法内斯库
A·M·琼斯
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SunEdison Inc
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SunEdison Inc
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Publication of CN102959697A publication Critical patent/CN102959697A/zh
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/7806—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)
CN2011800328260A 2010-06-30 2011-06-30 绝缘体上硅晶片的原位钝化方法 Pending CN102959697A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US35999810P 2010-06-30 2010-06-30
US61/359,998 2010-06-30
PCT/IB2011/052903 WO2012001659A2 (en) 2010-06-30 2011-06-30 Methods for in-situ passivation of silicon-on-insulator wafers

Publications (1)

Publication Number Publication Date
CN102959697A true CN102959697A (zh) 2013-03-06

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN2011800328260A Pending CN102959697A (zh) 2010-06-30 2011-06-30 绝缘体上硅晶片的原位钝化方法

Country Status (8)

Country Link
US (1) US8859393B2 (enExample)
EP (1) EP2589075A2 (enExample)
JP (1) JP5989642B2 (enExample)
KR (3) KR20190087668A (enExample)
CN (1) CN102959697A (enExample)
SG (1) SG186853A1 (enExample)
TW (1) TW201216414A (enExample)
WO (1) WO2012001659A2 (enExample)

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CN102427097A (zh) * 2011-11-23 2012-04-25 中国科学院物理研究所 一种硅的氧化钝化方法及钝化装置

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KR102212296B1 (ko) 2014-01-23 2021-02-04 글로벌웨이퍼스 씨오., 엘티디. 고 비저항 soi 웨이퍼 및 그 제조 방법
US9853133B2 (en) * 2014-09-04 2017-12-26 Sunedison Semiconductor Limited (Uen201334164H) Method of manufacturing high resistivity silicon-on-insulator substrate
US9899499B2 (en) 2014-09-04 2018-02-20 Sunedison Semiconductor Limited (Uen201334164H) High resistivity silicon-on-insulator wafer manufacturing method for reducing substrate loss
EP3573094B1 (en) 2014-11-18 2023-01-04 GlobalWafers Co., Ltd. High resistivity semiconductor-on-insulator wafer and a method of manufacturing
US10224233B2 (en) 2014-11-18 2019-03-05 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed by He-N2 co-implantation
EP3221884B1 (en) 2014-11-18 2022-06-01 GlobalWafers Co., Ltd. High resistivity semiconductor-on-insulator wafers with charge trapping layers and method of manufacturing thereof
WO2016140850A1 (en) 2015-03-03 2016-09-09 Sunedison Semiconductor Limited Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress
CN107408532A (zh) 2015-03-17 2017-11-28 太阳能爱迪生半导体有限公司 用于绝缘体上半导体结构的制造的热稳定电荷捕获层
US9881832B2 (en) 2015-03-17 2018-01-30 Sunedison Semiconductor Limited (Uen201334164H) Handle substrate for use in manufacture of semiconductor-on-insulator structure and method of manufacturing thereof
CN107667416B (zh) 2015-06-01 2021-08-31 环球晶圆股份有限公司 制造绝缘体上半导体的方法
EP3304586B1 (en) 2015-06-01 2020-10-07 GlobalWafers Co., Ltd. A method of manufacturing silicon germanium-on-insulator
US10529616B2 (en) 2015-11-20 2020-01-07 Globalwafers Co., Ltd. Manufacturing method of smoothing a semiconductor surface
US10468294B2 (en) 2016-02-19 2019-11-05 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed on a substrate with a rough surface
WO2017142849A1 (en) 2016-02-19 2017-08-24 Sunedison Semiconductor Limited Semiconductor on insulator structure comprising a buried high resistivity layer
US9831115B2 (en) 2016-02-19 2017-11-28 Sunedison Semiconductor Limited (Uen201334164H) Process flow for manufacturing semiconductor on insulator structures in parallel
WO2017155804A1 (en) 2016-03-07 2017-09-14 Sunedison Semiconductor Limited Method of manufacturing a semiconductor on insulator structure by a pressurized bond treatment
WO2017155808A1 (en) 2016-03-07 2017-09-14 Sunedison Semiconductor Limited Semiconductor on insulator structure comprising a plasma nitride layer and method of manufacture thereof
EP3427293B1 (en) 2016-03-07 2021-05-05 Globalwafers Co., Ltd. Semiconductor on insulator structure comprising a low temperature flowable oxide layer and method of manufacture thereof
US10573550B2 (en) 2016-03-07 2020-02-25 Globalwafers Co., Ltd. Semiconductor on insulator structure comprising a plasma oxide layer and method of manufacture thereof
EP3469120B1 (en) 2016-06-08 2022-02-02 GlobalWafers Co., Ltd. High resistivity single crystal silicon ingot and wafer having improved mechanical strength
US10269617B2 (en) 2016-06-22 2019-04-23 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising an isolation region
JP6831911B2 (ja) 2016-10-26 2021-02-17 グローバルウェーハズ カンパニー リミテッドＧｌｏｂａｌＷａｆｅｒｓ Ｃｏ．，Ｌｔｄ． 向上した電荷捕獲効率を有する高抵抗率シリコンオンインシュレータ基板
EP4009361B1 (en) 2016-12-05 2025-02-19 GlobalWafers Co., Ltd. High resistivity silicon-on-insulator structure
EP3653761B1 (en) 2016-12-28 2024-02-28 Sunedison Semiconductor Limited Silicon wafers with intrinsic gettering and gate oxide integrity yield
FR3061988B1 (fr) * 2017-01-13 2019-11-01 Soitec Procede de lissage de surface d'un substrat semiconducteur sur isolant
CN117038572A (zh) 2017-07-14 2023-11-10 太阳能爱迪生半导体有限公司 绝缘体上半导体结构的制造方法
US10916416B2 (en) 2017-11-14 2021-02-09 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor wafer with modified surface and fabrication method thereof
EP3785293B1 (en) 2018-04-27 2023-06-07 GlobalWafers Co., Ltd. Light assisted platelet formation facilitating layer transfer from a semiconductor donor substrate
JP7123182B2 (ja) 2018-06-08 2022-08-22 グローバルウェーハズ カンパニー リミテッド シリコン箔層の移転方法
US11296277B2 (en) 2018-10-16 2022-04-05 Samsung Electronics Co., Ltd. Variable resistance memory device having an anti-oxidation layer and a method of manufacturing the same

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GB1444589A (en) * 1972-08-17 1976-08-04 Purification Sciences Inc Corona generation apparatus
EP0272140A2 (en) * 1986-12-19 1988-06-22 Applied Materials, Inc. TEOS based plasma enhanced chemical vapor deposition process for deposition of silicon dioxide films.
US5330935A (en) * 1990-10-24 1994-07-19 International Business Machines Corporation Low temperature plasma oxidation process
CN1104264A (zh) * 1994-09-02 1995-06-28 复旦大学 热壁密装低温低压淀积二氧化硅薄膜技术
US5880029A (en) * 1996-12-27 1999-03-09 Motorola, Inc. Method of passivating semiconductor devices and the passivated devices
US5972802A (en) * 1997-10-07 1999-10-26 Seh America, Inc. Prevention of edge stain in silicon wafers by ozone dipping
US20020175143A1 (en) * 2001-05-22 2002-11-28 Seh America, Inc. Processes for polishing wafers
CN1574233A (zh) * 2003-05-29 2005-02-02 日东电工株式会社 晶片背表面处理方法以及切割片粘附装置
CN1705768A (zh) * 2002-10-17 2005-12-07 应用材料有限公司 沉积氧化膜的装置和方法
US20070184631A1 (en) * 2005-11-24 2007-08-09 Sumco Corporation Method of manufacturing bonded wafer
US20100130021A1 (en) * 2008-11-26 2010-05-27 Memc Electronic Materials, Inc. Method for processing a silicon-on-insulator structure
CN101728312A (zh) * 2008-10-22 2010-06-09 株式会社半导体能源研究所 Soi衬底及其制造方法

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GB1444589A (en) * 1972-08-17 1976-08-04 Purification Sciences Inc Corona generation apparatus
EP0272140A2 (en) * 1986-12-19 1988-06-22 Applied Materials, Inc. TEOS based plasma enhanced chemical vapor deposition process for deposition of silicon dioxide films.
US5330935A (en) * 1990-10-24 1994-07-19 International Business Machines Corporation Low temperature plasma oxidation process
CN1104264A (zh) * 1994-09-02 1995-06-28 复旦大学 热壁密装低温低压淀积二氧化硅薄膜技术
US5880029A (en) * 1996-12-27 1999-03-09 Motorola, Inc. Method of passivating semiconductor devices and the passivated devices
US5972802A (en) * 1997-10-07 1999-10-26 Seh America, Inc. Prevention of edge stain in silicon wafers by ozone dipping
US20020175143A1 (en) * 2001-05-22 2002-11-28 Seh America, Inc. Processes for polishing wafers
CN1705768A (zh) * 2002-10-17 2005-12-07 应用材料有限公司 沉积氧化膜的装置和方法
CN1574233A (zh) * 2003-05-29 2005-02-02 日东电工株式会社 晶片背表面处理方法以及切割片粘附装置
US20070184631A1 (en) * 2005-11-24 2007-08-09 Sumco Corporation Method of manufacturing bonded wafer
CN101728312A (zh) * 2008-10-22 2010-06-09 株式会社半导体能源研究所 Soi衬底及其制造方法
US20100130021A1 (en) * 2008-11-26 2010-05-27 Memc Electronic Materials, Inc. Method for processing a silicon-on-insulator structure

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102427097A (zh) * 2011-11-23 2012-04-25 中国科学院物理研究所 一种硅的氧化钝化方法及钝化装置

Also Published As

Publication number Publication date
EP2589075A2 (en) 2013-05-08
WO2012001659A3 (en) 2012-03-01
KR20130129897A (ko) 2013-11-29
KR20190087668A (ko) 2019-07-24
TW201216414A (en) 2012-04-16
WO2012001659A2 (en) 2012-01-05
US8859393B2 (en) 2014-10-14
KR102083688B1 (ko) 2020-03-02
US20120003814A1 (en) 2012-01-05
KR20180037326A (ko) 2018-04-11
SG186853A1 (en) 2013-02-28
JP5989642B2 (ja) 2016-09-07
JP2013534731A (ja) 2013-09-05

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Application publication date: 20130306