JP2013521641A - 複数の幾何学的ピクセル画像を合成する方法及び単一の変調器ピクセル画像を生成する方法 - Google Patents
複数の幾何学的ピクセル画像を合成する方法及び単一の変調器ピクセル画像を生成する方法 Download PDFInfo
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
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- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
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- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
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Abstract
【選択図】図4
Description
「ワークピースをパターニングする方法及び装置」と題する米国特許第7405414号及び「半導体のパーソナライゼーションにおける方法および装置」と題する米国特許第7842525号に関連する。本願は、更に、「マイクロリソグラフィ印刷における、勾配を援用した再サンプリング」と題する米国特許出願公開第2010/631595号に関連する。本願は、「部分的コヒーレント光照射における光照射方法及び装置」と題する米国特許出願第12/718904号にも関連する。
図2は、3本のアームを備える走査システムと、ハブの両側で書き込みを行なっている一対のワークピースとを示す。
図4は、標準およびカスタムパターンデータを合成するデータフローのハイレベルブロック図である。
図6は、異なるピクセルサイズ及びタイルサイズのグリッドを示す。
図7は、潜像生成用の、様々な種類の変調器及びステージを示す。
図1は、XYステージを持つSLMパターン・ジェネレーターの一般的な配置を示す。露光されるワークピースは、ステージ112に位置する。ステージの位置は、対の干渉計113などの正確な位置決め装置により制御される。
開示された技術は、基板上の放射感応性層でカスタム潜像を形成する方法を含む。この方法は、第1のデータパス上の標準的なデータを受信し、第2のデータパス上のカスタムパターンデータを受信することを含む。ここでいうデータパスが広く解釈されるべきものである。標準パターンデータは、カスタマイズにはよるが、複数のダイまたはダイ内の領域に、及びバッチ内の複数の基板に繰り返して使用されるパターンデータである。カスタムパターンデータは、標準パターンデータを変更してカスタム潜像を生成するために使用される。この方法はさらに、標準的なカスタムパターンデータを再サンプリングし合成して放射感応層に形成される物理的なカスタム潜像を示す合成され、かつラスタライズされたパターンデータを形成することを含む。潜像は、基板上に塗布されたレジストまたは他の放射感応性材料に応じて、ポジ型またはネガ型であってよい。典型的なデバイスの製造工程では、潜像が現像され、放射感応性層の部分がパターンを形成するために除去される。パターンは、電子デバイスを形成する一環として、材料を追加または削除するために使用される。
Claims (14)
- 基板上の放射感応性層にカスタム潜像を形成する方法であって、
第1データパス上の標準パターンデータを受信すること、
第2データパス上のカスタムパターンデータを受信すること、
前記標準パターンデータおよびカスタムパターンデータを再サンプリングするとともに合成して、放射感応性層内に形成される物理的なカスタム潜像を示す合成され、かつラスタライズされたパターンデータを形成すること、
直接描画装置を使用して合成され、かつラスタライズされたパターンデータから放射感応性層においてカスタム潜像を形成すること、
を備える方法。 - 前記標準パターンデータおよび前記カスタムパターンデータは、整列されたグリッド上のラスタライズデータであり、
再サンプリングをするに先立って、前記標準パターンデータおよび前記カスタムパターンデータを合成することを更に含む、請求項1に記載の方法。 - 前記標準パターンデータおよび前記カスタムパターンデータを整列されたグリッドに再サンプリングしてから合成することを含む、請求項1に記載の方法。
- 異なる処理ロジックを使用して、前記標準パターンデータおよび前記カスタムパターンデータを並列的に再サンプリングすることを更に含む、請求項3に記載の方法。
- 合成されたラスタライズパターンデータの第1の部分が直接描画装置によって使用されて、特定カスタム潜像の第1部分が形成されている間に、前記特定カスタム潜像のパターンデータの第2の部分に対し再サンプリングするとともに合成することを更に含む、請求項1−4のいずれか1項に記載の方法。
- 前記基板は、シリコンウエハである請求項1−5のいずれか1項に記載の方法。
- 前記基板は、半導体ウエハである請求項1−5のいずれか1項に記載の方法。
- 前記基板は、回路基板である請求項1−5のいずれか1項に記載の方法。
- 前記基板は、フラットパネルディスプレイである請求項1−5のいずれか1項に記載の方法。
- 前記基板は、ロール・ツー・ロール製造に使用される可撓性材料である請求項1−5のいずれか1項に記載の方法。
- 受信、再サンプリング及び形成操作を1回以上行い、前記カスタム潜像を用いて前記基板上の層をパターニングし、前記パターニングされた層を用いて電子デバイスを形成することを更に含む、請求項1−10のいずれか1項に記載の方法。
- 前記カスタムデータは、基板の特定のバッチに固有のものである請求項1−11のいずれか1項に記載の方法。
- 前記カスタムデータは、特定の基板に固有のものである請求項1−12のいずれか1項に記載の方法。
- 前記カスタムデータは、特定の基板上の特定のダイに固有のものである請求項1−13のいずれか1項に記載の方法。
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US31127610P | 2010-03-05 | 2010-03-05 | |
US61/311,276 | 2010-03-05 | ||
US13/039,206 US8539395B2 (en) | 2010-03-05 | 2011-03-02 | Method and apparatus for merging multiple geometrical pixel images and generating a single modulator pixel image |
US13/039,206 | 2011-03-02 | ||
PCT/EP2011/053337 WO2011107603A1 (en) | 2010-03-05 | 2011-03-04 | Method for merging multiple geometrical pixel images and generating a single modulator pixel image |
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JP2013521641A true JP2013521641A (ja) | 2013-06-10 |
JP6017316B2 JP6017316B2 (ja) | 2016-10-26 |
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US (3) | US8539395B2 (ja) |
EP (1) | EP2542940B1 (ja) |
JP (1) | JP6017316B2 (ja) |
KR (1) | KR101824748B1 (ja) |
CN (1) | CN102844715B (ja) |
WO (1) | WO2011107603A1 (ja) |
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JP2018041950A (ja) * | 2016-09-08 | 2018-03-15 | マッパー・リソグラフィー・アイピー・ビー.ブイ. | 荷電粒子マルチビームレットリソグラフィーシステムを使用し、一意的チップを製作するための方法及びシステム |
JP2018074133A (ja) * | 2016-10-27 | 2018-05-10 | マッパー・リソグラフィー・アイピー・ビー.ブイ. | 荷電粒子マルチビームレットリソグラフィーシステムを使用し、一意的チップを製作すること |
KR20190052041A (ko) * | 2016-09-08 | 2019-05-15 | 마퍼 리쏘그라피 아이피 비.브이. | 하전 입자 멀티-빔릿 리소그래피 시스템을 사용하여 고유 칩들을 제조하기 위한 방법 및 시스템 |
TWI757336B (zh) * | 2016-09-08 | 2022-03-11 | 荷蘭商Asml荷蘭公司 | 使用無罩幕微影曝光系統來製造電子裝置的方法、相關的電子裝置、相關的無罩幕微影曝光系統、相關的半導體製造設備、用於產生小波束控制資料的電腦實施方法、及相關的資料處理系統 |
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US8539395B2 (en) * | 2010-03-05 | 2013-09-17 | Micronic Laser Systems Ab | Method and apparatus for merging multiple geometrical pixel images and generating a single modulator pixel image |
FR2998063B1 (fr) * | 2012-11-15 | 2018-04-06 | Idemia France | Agencement de pixels pour realisation d'une image couleur par laser |
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KR102359084B1 (ko) * | 2016-12-23 | 2022-02-07 | 에이에스엠엘 네델란즈 비.브이. | 하전 입자 멀티-빔렛 리소그래피 시스템을 이용한 고유 칩 제조 |
KR20230117439A (ko) * | 2020-12-17 | 2023-08-08 | 어플라이드 머티어리얼스, 인코포레이티드 | 로컬 셀 교체를 위한 디지털 리소그래피에서의 적응적교체 맵들의 사용 |
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US9235127B2 (en) | 2016-01-12 |
US9291902B2 (en) | 2016-03-22 |
EP2542940B1 (en) | 2014-11-19 |
US20140137055A1 (en) | 2014-05-15 |
CN102844715B (zh) | 2015-12-02 |
KR101824748B1 (ko) | 2018-02-01 |
EP2542940A1 (en) | 2013-01-09 |
US8539395B2 (en) | 2013-09-17 |
US20120060131A1 (en) | 2012-03-08 |
KR20130061667A (ko) | 2013-06-11 |
US20140170566A1 (en) | 2014-06-19 |
WO2011107603A1 (en) | 2011-09-09 |
JP6017316B2 (ja) | 2016-10-26 |
CN102844715A (zh) | 2012-12-26 |
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