DE69032740T2 - Informationscodierungsverfahren zur Chipidentifizierung unter Verwendung von schrittlitografischen Methoden - Google Patents

Informationscodierungsverfahren zur Chipidentifizierung unter Verwendung von schrittlitografischen Methoden

Info

Publication number
DE69032740T2
DE69032740T2 DE69032740T DE69032740T DE69032740T2 DE 69032740 T2 DE69032740 T2 DE 69032740T2 DE 69032740 T DE69032740 T DE 69032740T DE 69032740 T DE69032740 T DE 69032740T DE 69032740 T2 DE69032740 T2 DE 69032740T2
Authority
DE
Germany
Prior art keywords
litographic
methods
coding method
information coding
chip identification
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69032740T
Other languages
English (en)
Other versions
DE69032740D1 (de
Inventor
Victor Akylas
Charles Seaborg
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Application granted granted Critical
Publication of DE69032740D1 publication Critical patent/DE69032740D1/de
Publication of DE69032740T2 publication Critical patent/DE69032740T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67294—Apparatus for monitoring, sorting or marking using identification means, e.g. labels on substrates or labels on containers
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70491—Information management, e.g. software; Active and passive control, e.g. details of controlling exposure processes or exposure tool monitoring processes
    • G03F7/70541—Tagging, i.e. hardware or software tagging of features or components, e.g. using tagging scripts or tagging identifier codes for identification of chips, shots or wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/681—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/57—Protection from inspection, reverse engineering or tampering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54433—Marks applied to semiconductor devices or parts containing identification or tracking information
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54433—Marks applied to semiconductor devices or parts containing identification or tracking information
    • H01L2223/5444—Marks applied to semiconductor devices or parts containing identification or tracking information for electrical read out
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
    • H01L2223/5448—Located on chip prior to dicing and remaining on chip after dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
DE69032740T 1989-12-20 1990-12-13 Informationscodierungsverfahren zur Chipidentifizierung unter Verwendung von schrittlitografischen Methoden Expired - Fee Related DE69032740T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US45354489A 1989-12-20 1989-12-20

Publications (2)

Publication Number Publication Date
DE69032740D1 DE69032740D1 (de) 1998-12-10
DE69032740T2 true DE69032740T2 (de) 1999-06-02

Family

ID=23800979

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69032740T Expired - Fee Related DE69032740T2 (de) 1989-12-20 1990-12-13 Informationscodierungsverfahren zur Chipidentifizierung unter Verwendung von schrittlitografischen Methoden

Country Status (3)

Country Link
EP (1) EP0434141B1 (de)
JP (1) JP3007421B2 (de)
DE (1) DE69032740T2 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102015112962A1 (de) * 2015-08-06 2017-02-09 Osram Opto Semiconductors Gmbh Verfahren zum Anordnen einer Vielzahl von Halbleiterstrukturelementen auf einem Träger und Träger mit einer Vielzahl von Halbleiterstrukturelementen

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19829674A1 (de) * 1998-07-03 2000-01-13 Heidelberg Instruments Mikrotechnik Gmbh Lithografisches Verfahren zur Individualisierung einzelner Chips im Scheibenprozeß
SE522531C2 (sv) 1999-11-24 2004-02-17 Micronic Laser Systems Ab Metod och anordning för märkning av halvledare
IL150784A0 (en) * 2000-01-20 2003-02-12 Zavitan Semiconductors Inc Personalized hardware
JP4700819B2 (ja) * 2000-03-10 2011-06-15 キヤノン株式会社 基板保持装置、半導体製造装置および半導体デバイス製造方法
JP2004253637A (ja) * 2003-02-20 2004-09-09 Hitachi High-Technologies Corp 半導体装置及び半導体製造管理システム
EP1589578B1 (de) * 2004-04-19 2015-02-25 STMicroelectronics Srl Methode zur Kennzeichnung von Chips
US8539395B2 (en) 2010-03-05 2013-09-17 Micronic Laser Systems Ab Method and apparatus for merging multiple geometrical pixel images and generating a single modulator pixel image
US9136222B2 (en) 2012-05-11 2015-09-15 GlobalFoundries, Inc. Chip identification pattern and method of forming
JP2017053999A (ja) * 2015-09-09 2017-03-16 株式会社東芝 半導体装置および検査パターン配置方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4409686A (en) * 1980-06-16 1983-10-11 Harris Corporation Method of serialization of dice
EP0057645A1 (de) 1981-02-04 1982-08-11 FAIRCHILD CAMERA & INSTRUMENT CORPORATION Elektrisch kodierte Identifizierung von integrierten Schaltungsanordnungen
DE3327503A1 (de) * 1983-07-29 1985-02-07 Siemens AG, 1000 Berlin und 8000 München Teststruktur zur kennzeichnung von halbleiterchips und verfahren zu deren kennzeichnung

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102015112962A1 (de) * 2015-08-06 2017-02-09 Osram Opto Semiconductors Gmbh Verfahren zum Anordnen einer Vielzahl von Halbleiterstrukturelementen auf einem Träger und Träger mit einer Vielzahl von Halbleiterstrukturelementen
US10381311B2 (en) 2015-08-06 2019-08-13 Osram Opto Semiconductors Gmbh Method of arranging a plurality of semiconductor structural elements on a carrier and carrier comprising a plurality of semiconductor structural elements
DE102015112962B4 (de) 2015-08-06 2021-07-22 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Verfahren zum Anordnen einer Vielzahl von Halbleiterstrukturelementen auf einem Träger und Träger mit einer Vielzahl von Halbleiterstrukturelementen

Also Published As

Publication number Publication date
EP0434141A1 (de) 1991-06-26
EP0434141B1 (de) 1998-11-04
DE69032740D1 (de) 1998-12-10
JP3007421B2 (ja) 2000-02-07
JPH0653098A (ja) 1994-02-25

Similar Documents

Publication Publication Date Title
DE3481890D1 (de) Fingerabdruckentwicklungsverfahren unter verwendung von cyanakrylaten.
DE68908201D1 (de) Verfahren zur befestigung von informationen an einer optischen scheibe, die ausschliesslich zum lesen vorbereitet ist.
DE3687519D1 (de) Verfahren zur beurteilung von knochen.
DE59005612D1 (de) Verfahren zur reduktion von farbstoffen.
DE3687982D1 (de) Verfahren zur herstellung von numerischen regelungsdaten.
DE3587377T2 (de) Verfahren zur herstellung von halbleiteranordnungen unter verwendung von silizium-auf- isolator techniken.
DE69823607D1 (de) Verfahren zur Datenkomprimierung unter Verwendung von Zeichenkettenanpassung
DE58908631D1 (de) Verfahren zur erfassung von druckflächenbedeckungsdaten.
DE69118883D1 (de) Automatisiertes verfahren zur herstellung von transpondervorrichtungen
DE3886773D1 (de) Verfahren zur identifizierung von peripheren einrichtungen.
DE69032740D1 (de) Informationscodierungsverfahren zur Chipidentifizierung unter Verwendung von schrittlitografischen Methoden
DE69002521D1 (de) Verfahren zur herstellung von mikrokapseln.
DE58901598D1 (de) Verfahren zur gewinnung von rohargon.
DE69000552T2 (de) Verfahren zur herstellung von mikrokapseln.
DE58901662D1 (de) Verfahren zur formgebung von naturleder.
DE58902220D1 (de) Verfahren zur herstellung von octadienolen.
DE68919707T2 (de) Verfahren zur erzeugung von unterchloriger säure.
ATA157489A (de) Verfahren zur aetzung von epoxid-harz
DE3586824T2 (de) Verfahren zur vorbereitung von numerischen daten.
DE59006073D1 (de) Verfahren zur herstellung von azopigmenten.
DE3876917D1 (de) Verfahren zur erzeugung von dimethylnaphthalenen.
DE59008513D1 (de) Verfahren zur aufnahme von spinresonanzspektren.
DE59001534D1 (de) Verfahren zur herstellung von aminen.
DE3865439D1 (de) Verfahren zur gewinnung von alkansulfonamiden.
DE59007460D1 (de) Verfahren zur herstellung von n-alkyl-halogenanilinen.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee