JP2012004552A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP2012004552A JP2012004552A JP2011110036A JP2011110036A JP2012004552A JP 2012004552 A JP2012004552 A JP 2012004552A JP 2011110036 A JP2011110036 A JP 2011110036A JP 2011110036 A JP2011110036 A JP 2011110036A JP 2012004552 A JP2012004552 A JP 2012004552A
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- Prior art keywords
- oxide semiconductor
- electrode
- drain electrode
- semiconductor layer
- insulating layer
- Prior art date
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- 239000012298 atmosphere Substances 0.000 description 19
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 18
- 229910052760 oxygen Inorganic materials 0.000 description 18
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- 239000007789 gas Substances 0.000 description 14
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- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
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Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
- H01L29/78648—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate arranged on opposing sides of the channel
Abstract
【解決手段】トランジスタにおいて、高電界の印加されるドレイン電極を平坦な面上に形成し、且つ、ゲート電極の、チャネル幅方向のドレイン電極側の端部、およびチャネル長方向の端部を、ゲート絶縁層を介して酸化物半導体層で覆うことによって、トランジスタの耐圧を向上させる。また、該トランジスタを用いた大電力向けの半導体装置を提供することができる。
【選択図】図1
Description
本実施の形態では、半導体装置および半導体装置の作製方法の一形態を、図1乃至図4を用いて説明する。
次に、図1に示す半導体装置の他の構成について、図3を参照して説明する。
本実施の形態では、上記実施の形態1とは異なる半導体装置の構成について、図5乃至図7を参照して説明する。なお、実施の形態1と同一部分または同様な機能を有する部分については、その詳細な説明は省略する。
次に、図5に示す半導体装置の他の構成について、図6を参照して説明する。
次に、図5に示す半導体装置の他の構成について、図7を参照して説明する。
上記実施の形態で示したトランジスタを用いて、様々な半導体装置を作製することができる。例えば、電圧変動が大きい電圧から安定した値の電源電圧を生成する場合、または複数の異なる値の電源電圧が必要となる場合などに、ある値の直流電圧を別の値の直流電圧に変換する回路(直流変換回路またはDC−DCコンバータともいう)を用いることができる。上記実施の形態で示したトランジスタは、絶縁破壊耐圧を向上させたトランジスタであるため、該トランジスタを適用することで、信頼性の高い直流変換回路を構成することができる。
本実施の形態は、上記実施の形態3に示す電源回路を適用することができる電子機器の一例について図9を用いて説明する。
401 ゲート電極
402 ゲート絶縁層
403 酸化物半導体層
404 第1の導電層
405a 第1のソース電極
405b 第1のドレイン電極
406 絶縁層
406a 第1の絶縁層
406b 第2の絶縁層
407a 第2のソース電極
407b 第2のドレイン電極
407c 第2の導電層
410 トランジスタ
420 トランジスタ
450 トランジスタ
460 トランジスタ
470 トランジスタ
601 蓄電装置
602 直流変換回路
2800 筐体
2801 筐体
2802 表示パネル
2803 スピーカー
2804 マイクロフォン
2805 操作キー
2806 ポインティングデバイス
2807 カメラ用レンズ
2808 外部接続端子
2810 太陽電池セル
2811 外部メモリスロット
3001 本体
3002 筐体
3003 表示部
3004 キーボード
Claims (5)
- ゲート電極と、
前記ゲート電極を覆うゲート絶縁層と、
前記ゲート絶縁層上に設けられた酸化物半導体層と、
前記酸化物半導体層に接して設けられた第1のソース電極および第1のドレイン電極と、
前記酸化物半導体層、前記第1のソース電極および前記第1のドレイン電極を覆う絶縁層と、
前記絶縁層上に設けられ、前記第1のソース電極または前記第1のドレイン電極とそれぞれ電気的に接続する、第2のソース電極および第2のドレイン電極と、を有し、
前記第1のソース電極および前記第1のドレイン電極と、前記酸化物半導体層とが接する領域は、前記酸化物半導体層と前記ゲート電極とが重畳する領域にあり、
前記酸化物半導体層のチャネル長方向の長さは、前記ゲート電極のチャネル長方向の長さよりも大きく、
前記第2のドレイン電極は、前記ゲート電極と重畳する領域を有し、該領域において、前記第2のドレイン電極と前記ゲート電極との間には、少なくとも前記酸化物半導体層が設けられる半導体装置。 - ゲート電極と、
前記ゲート電極を覆うゲート絶縁層と、
前記ゲート絶縁層上に設けられた酸化物半導体層と、
前記酸化物半導体層に接して設けられた第1のソース電極および第1のドレイン電極と、
前記酸化物半導体層、前記第1のソース電極および前記第1のドレイン電極を覆う第1の絶縁層と、
前記第1の絶縁層上に設けられた第1の導電層と、
前記第1の導電層を覆う第2の絶縁層と、
前記第2の絶縁層上に設けられ、前記第1のソース電極と電気的に接続する第2のソース電極と、前記第1のドレイン電極と電気的に接続する第2のドレイン電極と、前記第1の導電層と電気的に接続する第2の導電層と、を有し、
前記第1のソース電極および前記第1のドレイン電極と、前記酸化物半導体層とが接する領域は、前記酸化物半導体層と前記ゲート電極とが重畳する領域にあり、
前記酸化物半導体層のチャネル長方向の長さは、前記ゲート電極のチャネル長方向の長さよりも大きく、
前記第2のドレイン電極は、前記ゲート電極と重畳する領域を有し、該領域において、前記第2のドレイン電極と前記ゲート電極との間には、少なくとも前記酸化物半導体層が設けられる半導体装置。 - ゲート電極と、
前記ゲート電極を覆うゲート絶縁層と、
前記ゲート絶縁層上に設けられた酸化物半導体層と、
前記酸化物半導体層に接して設けられた複数の第1のソース電極および複数の第1のドレイン電極と、
前記酸化物半導体層、前記複数の第1のソース電極および前記複数の第1のドレイン電極を覆う絶縁層と、
前記絶縁層上に設けられ、前記第1のソース電極のそれぞれと電気的に接続する第2のソース電極と、前記第1のドレイン電極のそれぞれと電気的に接続する第2のドレイン電極と、を有し、
前記第1のソース電極および前記第1のドレイン電極のそれぞれと、前記酸化物半導体層とが接する領域は、前記酸化物半導体層と前記ゲート電極とが重畳する領域にあり、
前記酸化物半導体層のチャネル長方向の長さは、前記ゲート電極のチャネル長方向の長さよりも大きく、
前記第2のドレイン電極は、前記ゲート電極と重畳する領域を有し、該領域において、前記第2のドレイン電極と前記ゲート電極との間には、少なくとも前記酸化物半導体層が設けられる半導体装置。 - ゲート電極と、
前記ゲート電極を覆うゲート絶縁層と、
前記ゲート絶縁層上に設けられた酸化物半導体層と、
前記酸化物半導体層に接して設けられた複数の第1のソース電極および複数の第1のドレイン電極と、
前記酸化物半導体層、前記複数の第1のソース電極および前記複数の第1のドレイン電極を覆う第1の絶縁層と、
前記第1の絶縁層上に設けられた第1の導電層と、
前記第1の導電層を覆う第2の絶縁層と、
前記第2の絶縁層上に設けられ、前記複数の第1のソース電極のそれぞれと電気的に接続する第2のソース電極と、前記複数の第1のドレイン電極のそれぞれと電気的に接続する第2のドレイン電極と、前記第1の導電層と電気的に接続する第2の導電層と、を有し、
前記第1のソース電極および前記第1のドレイン電極のそれぞれと、前記酸化物半導体層とが接する領域は、前記酸化物半導体層と前記ゲート電極とが重畳する領域にあり、
前記酸化物半導体層のチャネル長方向の長さは、前記ゲート電極のチャネル長方向の長さよりも大きく、
前記第2のドレイン電極は、前記ゲート電極と重畳する領域を有し、該領域において、前記第2のドレイン電極と前記ゲート電極との間には、少なくとも前記酸化物半導体層が設けられる半導体装置。 - 前記第1の導電層は、前記第2のドレイン電極と重畳しない請求項4に記載の半導体装置。
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US20110284837A1 (en) | 2011-11-24 |
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