JP2011090865A - 導電フィルムおよびその製造方法、並びに半導体装置およびその製造方法 - Google Patents

導電フィルムおよびその製造方法、並びに半導体装置およびその製造方法 Download PDF

Info

Publication number
JP2011090865A
JP2011090865A JP2009243028A JP2009243028A JP2011090865A JP 2011090865 A JP2011090865 A JP 2011090865A JP 2009243028 A JP2009243028 A JP 2009243028A JP 2009243028 A JP2009243028 A JP 2009243028A JP 2011090865 A JP2011090865 A JP 2011090865A
Authority
JP
Japan
Prior art keywords
conductive film
layer
anodized layer
linear conductors
connection terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2009243028A
Other languages
English (en)
Japanese (ja)
Other versions
JP2011090865A5 (https=
Inventor
Michio Horiuchi
道夫 堀内
Yasue Tokutake
安衛 徳武
Yuichi Matsuda
勇一 松田
Takeshi Kobayashi
壮 小林
Tatsuaki Denda
達明 伝田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2009243028A priority Critical patent/JP2011090865A/ja
Priority to US12/909,096 priority patent/US20110095419A1/en
Publication of JP2011090865A publication Critical patent/JP2011090865A/ja
Publication of JP2011090865A5 publication Critical patent/JP2011090865A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/095—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers of vias therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09945—Universal aspects, e.g. universal inner layers or via grid, or anisotropic interposer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10378—Interposers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0315—Oxidising metal
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07232—Compression bonding, e.g. thermocompression bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Non-Insulated Conductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2009243028A 2009-10-22 2009-10-22 導電フィルムおよびその製造方法、並びに半導体装置およびその製造方法 Pending JP2011090865A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009243028A JP2011090865A (ja) 2009-10-22 2009-10-22 導電フィルムおよびその製造方法、並びに半導体装置およびその製造方法
US12/909,096 US20110095419A1 (en) 2009-10-22 2010-10-21 Conductive film, method of manufacturing the same, semiconductor device and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009243028A JP2011090865A (ja) 2009-10-22 2009-10-22 導電フィルムおよびその製造方法、並びに半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
JP2011090865A true JP2011090865A (ja) 2011-05-06
JP2011090865A5 JP2011090865A5 (https=) 2012-08-30

Family

ID=43897689

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009243028A Pending JP2011090865A (ja) 2009-10-22 2009-10-22 導電フィルムおよびその製造方法、並びに半導体装置およびその製造方法

Country Status (2)

Country Link
US (1) US20110095419A1 (https=)
JP (1) JP2011090865A (https=)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017150058A1 (ja) * 2016-02-29 2017-09-08 富士フイルム株式会社 異方導電性接合部材、半導体デバイス、半導体パッケージおよび半導体デバイスの製造方法
WO2017203884A1 (ja) * 2016-05-27 2017-11-30 富士フイルム株式会社 異方導電材、電子素子、半導体素子を含む構造体および電子素子の製造方法
JP2018037509A (ja) * 2016-08-31 2018-03-08 富士フイルム株式会社 多層配線基板の製造方法
JP2020107834A (ja) * 2018-12-28 2020-07-09 大日本印刷株式会社 電子ユニット
WO2022044585A1 (ja) * 2020-08-24 2022-03-03 富士フイルム株式会社 金属充填微細構造体の製造方法

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101739742B1 (ko) * 2010-11-11 2017-05-25 삼성전자 주식회사 반도체 패키지 및 이를 포함하는 반도체 시스템
US9226396B2 (en) 2013-03-12 2015-12-29 Invensas Corporation Porous alumina templates for electronic packages
JP2014216552A (ja) * 2013-04-26 2014-11-17 富士通株式会社 積層構造体及びその製造方法
US11139262B2 (en) * 2019-02-07 2021-10-05 Micron Technology, Inc. Use of pre-channeled materials for anisotropic conductors
KR102608888B1 (ko) * 2019-06-04 2023-12-01 (주)포인트엔지니어링 전기접속용 양극산화막 및 광소자 디스플레이 및 광소자 디스플레이 제조 방법
KR102865650B1 (ko) * 2020-01-31 2025-09-29 (주)포인트엔지니어링 프로브 헤드 및 이를 포함하는 프로브 카드

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04126307A (ja) * 1990-03-16 1992-04-27 Ricoh Co Ltd 異方性導電膜およびその製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0284820A3 (en) * 1987-03-04 1989-03-08 Canon Kabushiki Kaisha Electrically connecting member, and electric circuit member and electric circuit device with the connecting member
US5379515A (en) * 1989-12-11 1995-01-10 Canon Kabushiki Kaisha Process for preparing electrical connecting member
JPH10308565A (ja) * 1997-05-02 1998-11-17 Shinko Electric Ind Co Ltd 配線基板
JP2003034894A (ja) * 2001-07-25 2003-02-07 Kobe Steel Ltd 耐腐食性に優れたＡｌ合金部材
ATE419661T1 (de) * 2003-09-09 2009-01-15 Nitto Denko Corp Anisotrop-leitender film , herstellungs- und gebrauchsverfahren
TWI255466B (en) * 2004-10-08 2006-05-21 Ind Tech Res Inst Polymer-matrix conductive film and method for fabricating the same
JP5143045B2 (ja) * 2008-07-09 2013-02-13 富士フイルム株式会社 微細構造体およびその製造方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04126307A (ja) * 1990-03-16 1992-04-27 Ricoh Co Ltd 異方性導電膜およびその製造方法

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017150058A1 (ja) * 2016-02-29 2017-09-08 富士フイルム株式会社 異方導電性接合部材、半導体デバイス、半導体パッケージおよび半導体デバイスの製造方法
KR102110258B1 (ko) * 2016-02-29 2020-05-13 후지필름 가부시키가이샤 이방 도전성 접합 부재, 반도체 디바이스, 반도체 패키지 및 반도체 디바이스의 제조 방법
US10559548B2 (en) 2016-02-29 2020-02-11 Fujifilm Corporation Anisotropic conductive bonding member, semiconductor device, semiconductor package and semiconductor device production method
KR20180105205A (ko) * 2016-02-29 2018-09-27 후지필름 가부시키가이샤 이방 도전성 접합 부재, 반도체 디바이스, 반도체 패키지 및 반도체 디바이스의 제조 방법
JPWO2017150058A1 (ja) * 2016-02-29 2018-11-08 富士フイルム株式会社 異方導電性接合部材、半導体デバイス、半導体パッケージおよび半導体デバイスの製造方法
JPWO2017203884A1 (ja) * 2016-05-27 2019-02-21 富士フイルム株式会社 異方導電材、電子素子、半導体素子を含む構造体および電子素子の製造方法
KR20180134970A (ko) * 2016-05-27 2018-12-19 후지필름 가부시키가이샤 이방 도전재, 전자 소자, 반도체 소자를 포함하는 구조체 및 전자 소자의 제조 방법
WO2017203884A1 (ja) * 2016-05-27 2017-11-30 富士フイルム株式会社 異方導電材、電子素子、半導体素子を含む構造体および電子素子の製造方法
KR102134135B1 (ko) * 2016-05-27 2020-07-15 후지필름 가부시키가이샤 전자 소자, 및 반도체 소자를 포함하는 구조체
JP2018037509A (ja) * 2016-08-31 2018-03-08 富士フイルム株式会社 多層配線基板の製造方法
JP2020107834A (ja) * 2018-12-28 2020-07-09 大日本印刷株式会社 電子ユニット
WO2022044585A1 (ja) * 2020-08-24 2022-03-03 富士フイルム株式会社 金属充填微細構造体の製造方法
JPWO2022044585A1 (https=) * 2020-08-24 2022-03-03
JP7506753B2 (ja) 2020-08-24 2024-06-26 富士フイルム株式会社 金属充填微細構造体の製造方法

Also Published As

Publication number Publication date
US20110095419A1 (en) 2011-04-28

Similar Documents

Publication Publication Date Title
JP2011090865A (ja) 導電フィルムおよびその製造方法、並びに半導体装置およびその製造方法
JP2011091185A (ja) 導電フィルムおよびその製造方法、並びに半導体装置およびその製造方法
JP2011501410A (ja) 頑健な多層配線要素および埋設された超小型電子素子とのアセンブリ
JP2011090865A5 (https=)
CN107770947A (zh) 印刷布线板和印刷布线板的制造方法
JP6412587B2 (ja) 多層配線基板
JP2005109307A (ja) 回路部品内蔵基板およびその製造方法
CN102904082A (zh) 连接器结构及其制作方法
WO2013061500A1 (ja) フレキシブル配線基板およびその製造方法
JP5568169B2 (ja) 配線基板及びその製造方法
JP2014063981A (ja) 配線基板およびその製造方法
JP4598140B2 (ja) 部品内蔵配線板、部品内蔵配線板の製造方法
JP2016039302A (ja) プリント配線板とその製造方法および半導体パッケージ
KR100952297B1 (ko) 반도체 소자 테스트용 콘택터 및 그 제조방법
JP2005159074A (ja) 内層側に凸出部のあるビアホール接続用の電極
JP3862454B2 (ja) 金属ベース多層回路基板
JP2016100352A (ja) プリント配線板およびその製造方法
US11437196B2 (en) Multilayer ceramic substrate and probe card including same
JPH08148782A (ja) 金属コア回路板
JP6268791B2 (ja) 樹脂多層基板およびその製造方法
KR20100110152A (ko) 열전도성을 높이기 위한 금속성 인쇄회로기판의 구조 및 제조 방법
JP2007158069A (ja) 半導体パッケージの外部接続構造及びその製造方法
TW200948239A (en) A printed circuit board having an embedded component and a method thereof
JP2009130095A (ja) 部品内蔵配線板、部品内蔵配線板の製造方法
KR101162506B1 (ko) 반도체 패키지 제조용 인쇄회로기판 및 그 제조 방법

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120718

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20120718

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20131224

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20140422