JP2010245412A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2010245412A5 JP2010245412A5 JP2009094517A JP2009094517A JP2010245412A5 JP 2010245412 A5 JP2010245412 A5 JP 2010245412A5 JP 2009094517 A JP2009094517 A JP 2009094517A JP 2009094517 A JP2009094517 A JP 2009094517A JP 2010245412 A5 JP2010245412 A5 JP 2010245412A5
- Authority
- JP
- Japan
- Prior art keywords
- chip
- bonding apparatus
- die bonding
- laminate
- laminates
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims 2
- 239000012790 adhesive layer Substances 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 claims 1
- 238000003825 pressing Methods 0.000 claims 1
- 230000003068 static effect Effects 0.000 claims 1
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009094517A JP2010245412A (ja) | 2009-04-09 | 2009-04-09 | 半導体集積回路装置の製造方法 |
| TW099107105A TW201108336A (en) | 2009-04-09 | 2010-03-11 | Manufacturing method of semiconductor integrated circuit device |
| KR1020100032282A KR20100112536A (ko) | 2009-04-09 | 2010-04-08 | 반도체 집적 회로 장치의 제조 방법 |
| US12/756,178 US8450150B2 (en) | 2009-04-09 | 2010-04-08 | Manufacturing method of semiconductor integrated circuit device |
| CN201010155938A CN101866862A (zh) | 2009-04-09 | 2010-04-08 | 半导体集成电路器件的制造方法 |
| US13/899,270 US20130330879A1 (en) | 2009-04-09 | 2013-05-21 | Manufacturing method of semiconductor integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009094517A JP2010245412A (ja) | 2009-04-09 | 2009-04-09 | 半導体集積回路装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2010245412A JP2010245412A (ja) | 2010-10-28 |
| JP2010245412A5 true JP2010245412A5 (enExample) | 2012-04-19 |
Family
ID=42934725
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009094517A Pending JP2010245412A (ja) | 2009-04-09 | 2009-04-09 | 半導体集積回路装置の製造方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US8450150B2 (enExample) |
| JP (1) | JP2010245412A (enExample) |
| KR (1) | KR20100112536A (enExample) |
| CN (1) | CN101866862A (enExample) |
| TW (1) | TW201108336A (enExample) |
Families Citing this family (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5207868B2 (ja) * | 2008-02-08 | 2013-06-12 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| KR101563630B1 (ko) * | 2009-09-17 | 2015-10-28 | 에스케이하이닉스 주식회사 | 반도체 패키지 |
| WO2011113136A1 (en) * | 2010-03-18 | 2011-09-22 | Mosaid Technologies Incorporated | Multi-chip package with offset die stacking and method of making same |
| US8349116B1 (en) | 2011-11-18 | 2013-01-08 | LuxVue Technology Corporation | Micro device transfer head heater assembly and method of transferring a micro device |
| US8809875B2 (en) | 2011-11-18 | 2014-08-19 | LuxVue Technology Corporation | Micro light emitting diode |
| US8967452B2 (en) * | 2012-04-17 | 2015-03-03 | Asm Technology Singapore Pte Ltd | Thermal compression bonding of semiconductor chips |
| CN102760666A (zh) * | 2012-07-05 | 2012-10-31 | 西安永电电气有限责任公司 | 用于igbt的键合真空吸附工装 |
| KR102231293B1 (ko) | 2014-02-10 | 2021-03-23 | 삼성전자주식회사 | 다이 본딩 장치 |
| US9685187B1 (en) * | 2014-09-26 | 2017-06-20 | Western Digital (Fremont), Llc | Bonding tool and method for high accuracy chip-to-chip bonding |
| US9647189B2 (en) * | 2015-01-26 | 2017-05-09 | Cooledge Lighting Inc. | Methods for adhesive bonding of electronic devices |
| KR102341750B1 (ko) | 2015-06-30 | 2021-12-23 | 삼성전자주식회사 | 반도체 패키지 및 이의 제조 방법 |
| KR20170009750A (ko) * | 2015-07-15 | 2017-01-25 | 서울바이오시스 주식회사 | 발광 다이오드 패키지 제조 방법 |
| US11171114B2 (en) | 2015-12-02 | 2021-11-09 | Intel Corporation | Die stack with cascade and vertical connections |
| US10199351B2 (en) * | 2015-12-30 | 2019-02-05 | Skyworks Solutions, Inc. | Method and device for improved die bonding |
| KR102579876B1 (ko) | 2016-02-22 | 2023-09-18 | 삼성전자주식회사 | 반도체 패키지 |
| JP6316873B2 (ja) * | 2016-05-31 | 2018-04-25 | 株式会社新川 | ダイの実装方法 |
| JP6349539B2 (ja) * | 2016-09-30 | 2018-07-04 | 株式会社新川 | 半導体装置の製造方法および実装装置 |
| JP6349540B2 (ja) * | 2016-10-06 | 2018-07-04 | 株式会社新川 | 半導体チップの実装装置、および、半導体装置の製造方法 |
| TWI673805B (zh) * | 2017-01-30 | 2019-10-01 | Shinkawa Ltd. | 安裝裝置以及安裝系統 |
| US10431483B2 (en) | 2017-07-14 | 2019-10-01 | Industrial Technology Research Institute | Transfer support and transfer module |
| US11227787B2 (en) | 2017-07-14 | 2022-01-18 | Industrial Technology Research Institute | Transfer support and transfer module |
| CN111344849B (zh) * | 2017-09-29 | 2023-09-08 | 株式会社新川 | 封装装置 |
| TWI807348B (zh) * | 2021-06-21 | 2023-07-01 | 矽品精密工業股份有限公司 | 覆晶作業及其應用之接合設備 |
| JP2023039555A (ja) | 2021-09-09 | 2023-03-22 | キオクシア株式会社 | 半導体装置の製造方法 |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100636776B1 (ko) * | 1998-10-14 | 2006-10-20 | 가부시키가이샤 히타치세이사쿠쇼 | 반도체 장치 및 그 제조 방법 |
| JP2008098608A (ja) * | 2006-09-15 | 2008-04-24 | Lintec Corp | 半導体装置の製造方法 |
| MY153208A (en) * | 2006-09-15 | 2015-01-29 | Lintec Corp | Process for manufacturing semiconductor devices |
| JP5559452B2 (ja) * | 2006-12-20 | 2014-07-23 | 富士通セミコンダクター株式会社 | 半導体装置及びその製造方法 |
| JP5032231B2 (ja) | 2007-07-23 | 2012-09-26 | リンテック株式会社 | 半導体装置の製造方法 |
| JP5222508B2 (ja) * | 2007-09-07 | 2013-06-26 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
| JP5538682B2 (ja) * | 2008-03-06 | 2014-07-02 | ピーエスフォー ルクスコ エスエイアールエル | 半導体装置及びその製造方法 |
-
2009
- 2009-04-09 JP JP2009094517A patent/JP2010245412A/ja active Pending
-
2010
- 2010-03-11 TW TW099107105A patent/TW201108336A/zh unknown
- 2010-04-08 CN CN201010155938A patent/CN101866862A/zh active Pending
- 2010-04-08 KR KR1020100032282A patent/KR20100112536A/ko not_active Withdrawn
- 2010-04-08 US US12/756,178 patent/US8450150B2/en not_active Expired - Fee Related
-
2013
- 2013-05-21 US US13/899,270 patent/US20130330879A1/en not_active Abandoned
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2010245412A5 (enExample) | ||
| JP2010245259A5 (enExample) | ||
| JP2010251632A5 (enExample) | ||
| JP2011009514A5 (enExample) | ||
| JP2008311635A5 (enExample) | ||
| TW200625572A (en) | Three dimensional package structure of semiconductor chip embedded in substrate and method for fabricating the same | |
| JP2010147153A5 (enExample) | ||
| JP2011119502A5 (enExample) | ||
| JP2013069807A5 (enExample) | ||
| CN103745932B (zh) | Wb型封装基板的制作方法 | |
| JP2013069808A5 (enExample) | ||
| JP2012515671A5 (enExample) | ||
| TW201108336A (en) | Manufacturing method of semiconductor integrated circuit device | |
| JP2013120771A5 (enExample) | ||
| JP2010073893A5 (enExample) | ||
| JP2014022665A5 (enExample) | ||
| JP2011029609A5 (ja) | 半導体装置の作製方法 | |
| JP2014192386A5 (enExample) | ||
| JP2009038358A5 (enExample) | ||
| JP2012513079A5 (enExample) | ||
| TW201424501A (zh) | 封裝結構及其製作方法 | |
| JP2010287710A5 (ja) | 半導体装置の製造方法 | |
| WO2009022578A1 (ja) | 素子構造およびその製造方法 | |
| JP2015097258A5 (enExample) | ||
| JP2009044136A5 (enExample) |