JP2010004028A - 配線基板及びその製造方法、及び半導体装置 - Google Patents
配線基板及びその製造方法、及び半導体装置 Download PDFInfo
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- JP2010004028A JP2010004028A JP2009121425A JP2009121425A JP2010004028A JP 2010004028 A JP2010004028 A JP 2010004028A JP 2009121425 A JP2009121425 A JP 2009121425A JP 2009121425 A JP2009121425 A JP 2009121425A JP 2010004028 A JP2010004028 A JP 2010004028A
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- wiring pattern
- wiring
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Electromagnetism (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structure Of Printed Boards (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009121425A JP2010004028A (ja) | 2008-05-23 | 2009-05-19 | 配線基板及びその製造方法、及び半導体装置 |
| US12/468,899 US8179689B2 (en) | 2008-05-23 | 2009-05-20 | Printed circuit board, method of fabricating printed circuit board, and semiconductor device |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008135610 | 2008-05-23 | ||
| JP2009121425A JP2010004028A (ja) | 2008-05-23 | 2009-05-19 | 配線基板及びその製造方法、及び半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2010004028A true JP2010004028A (ja) | 2010-01-07 |
| JP2010004028A5 JP2010004028A5 (enExample) | 2012-04-26 |
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| Application Number | Title | Priority Date | Filing Date |
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| JP2009121425A Pending JP2010004028A (ja) | 2008-05-23 | 2009-05-19 | 配線基板及びその製造方法、及び半導体装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8179689B2 (enExample) |
| JP (1) | JP2010004028A (enExample) |
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| JP2012094682A (ja) * | 2010-10-27 | 2012-05-17 | Ngk Spark Plug Co Ltd | 多層配線基板の製造方法 |
| JP2016149517A (ja) * | 2015-02-10 | 2016-08-18 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
| JPWO2024053096A1 (enExample) * | 2022-09-09 | 2024-03-14 | ||
| WO2024215099A1 (ko) * | 2023-04-11 | 2024-10-17 | 엘지이노텍 주식회사 | 회로 기판 및 이를 포함하는 반도체 패키지 |
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| JP4783692B2 (ja) * | 2006-08-10 | 2011-09-28 | 新光電気工業株式会社 | キャパシタ内蔵基板及びその製造方法と電子部品装置 |
| TWI456715B (zh) * | 2009-06-19 | 2014-10-11 | 日月光半導體製造股份有限公司 | 晶片封裝結構及其製造方法 |
| JP5623308B2 (ja) * | 2010-02-26 | 2014-11-12 | 日本特殊陶業株式会社 | 多層配線基板及びその製造方法 |
| KR101710178B1 (ko) * | 2010-06-29 | 2017-02-24 | 삼성전자 주식회사 | 임베디이드 칩 온 칩 패키지 및 이를 포함하는 패키지 온 패키지 |
| US8704104B2 (en) * | 2010-07-19 | 2014-04-22 | Asml Netherlands B.V. | Electrical connector, electrical connection system and lithographic apparatus |
| EP2450308B1 (en) * | 2010-11-05 | 2013-06-12 | Nxp B.V. | Method of manufacturing IC having a moisture barrier, IC and apparatus |
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| US9496211B2 (en) | 2012-11-21 | 2016-11-15 | Intel Corporation | Logic die and other components embedded in build-up layers |
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| JP5754468B2 (ja) * | 2013-06-13 | 2015-07-29 | トヨタ自動車株式会社 | キャパシタ配置構造及びキャパシタ実装方法 |
| KR20150146287A (ko) * | 2014-06-23 | 2015-12-31 | 삼성전기주식회사 | 인쇄회로기판 및 인쇄회로기판의 제조 방법 |
| CN104409364B (zh) * | 2014-11-19 | 2017-12-01 | 清华大学 | 转接板及其制作方法、封装结构及用于转接板的键合方法 |
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| US11404365B2 (en) * | 2019-05-07 | 2022-08-02 | International Business Machines Corporation | Direct attachment of capacitors to flip chip dies |
| KR20230068128A (ko) * | 2021-11-10 | 2023-05-17 | 삼성전자주식회사 | 반도체 소자 및 이를 포함하는 반도체 패키지 |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002171073A (ja) * | 2000-09-19 | 2002-06-14 | Ngk Spark Plug Co Ltd | 配線基板 |
| JP2004214378A (ja) * | 2002-12-27 | 2004-07-29 | Toshiba Corp | 高周波集積回路装置 |
| JP2006059992A (ja) * | 2004-08-19 | 2006-03-02 | Shinko Electric Ind Co Ltd | 電子部品内蔵基板の製造方法 |
| JP2006339276A (ja) * | 2005-05-31 | 2006-12-14 | Shinko Electric Ind Co Ltd | 接続用基板及びその製造方法 |
| JP2008010867A (ja) * | 2006-06-26 | 2008-01-17 | Ibiden Co Ltd | コンデンサ内蔵配線基板 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1137332B1 (en) * | 1999-09-02 | 2006-11-22 | Ibiden Co., Ltd. | Printed wiring board and method of producing the same and capacitor to be contained in printed wiring board |
| US6407929B1 (en) * | 2000-06-29 | 2002-06-18 | Intel Corporation | Electronic package having embedded capacitors and method of fabrication therefor |
| US6577490B2 (en) * | 2000-12-12 | 2003-06-10 | Ngk Spark Plug Co., Ltd. | Wiring board |
| JP3492348B2 (ja) * | 2001-12-26 | 2004-02-03 | 新光電気工業株式会社 | 半導体装置用パッケージの製造方法 |
| JP2007027683A (ja) * | 2005-06-15 | 2007-02-01 | Ngk Spark Plug Co Ltd | 配線基板及びその製造方法 |
| KR100744903B1 (ko) * | 2006-02-22 | 2007-08-01 | 삼성전기주식회사 | 디커플링 기능을 갖는 다층 기판 |
| US7808799B2 (en) * | 2006-04-25 | 2010-10-05 | Ngk Spark Plug Co., Ltd. | Wiring board |
| JP4722795B2 (ja) * | 2006-08-31 | 2011-07-13 | 富士通株式会社 | 配線基板および電子部品モジュール |
-
2009
- 2009-05-19 JP JP2009121425A patent/JP2010004028A/ja active Pending
- 2009-05-20 US US12/468,899 patent/US8179689B2/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002171073A (ja) * | 2000-09-19 | 2002-06-14 | Ngk Spark Plug Co Ltd | 配線基板 |
| JP2004214378A (ja) * | 2002-12-27 | 2004-07-29 | Toshiba Corp | 高周波集積回路装置 |
| JP2006059992A (ja) * | 2004-08-19 | 2006-03-02 | Shinko Electric Ind Co Ltd | 電子部品内蔵基板の製造方法 |
| JP2006339276A (ja) * | 2005-05-31 | 2006-12-14 | Shinko Electric Ind Co Ltd | 接続用基板及びその製造方法 |
| JP2008010867A (ja) * | 2006-06-26 | 2008-01-17 | Ibiden Co Ltd | コンデンサ内蔵配線基板 |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012094682A (ja) * | 2010-10-27 | 2012-05-17 | Ngk Spark Plug Co Ltd | 多層配線基板の製造方法 |
| US8826526B2 (en) | 2010-10-27 | 2014-09-09 | Ngk Spark Plug Co., Ltd. | Method of manufacturing multilayer wiring substrate |
| JP2016149517A (ja) * | 2015-02-10 | 2016-08-18 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
| JPWO2024053096A1 (enExample) * | 2022-09-09 | 2024-03-14 | ||
| WO2024053096A1 (ja) * | 2022-09-09 | 2024-03-14 | オリンパスメディカルシステムズ株式会社 | 電子デバイス、内視鏡、および、電子デバイスの製造方法 |
| WO2024215099A1 (ko) * | 2023-04-11 | 2024-10-17 | 엘지이노텍 주식회사 | 회로 기판 및 이를 포함하는 반도체 패키지 |
Also Published As
| Publication number | Publication date |
|---|---|
| US8179689B2 (en) | 2012-05-15 |
| US20090290317A1 (en) | 2009-11-26 |
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