JP2007027683A - 配線基板及びその製造方法 - Google Patents
配線基板及びその製造方法 Download PDFInfo
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Abstract
【解決手段】 本発明の配線基板1は、コア基板CBに収容されたセラミック副コア3の導体パッド31において、その表面にCuメッキ層が形成され、且つ、Cuメッキ層の表面が高分子材料との密着性を向上させるためのCu表面化学処理が施された処理面とされ、処理面に配線積層部L1,L2の最下層の誘電体層B11,B21及びそれに貫通形成されたビア導体6が接触してなることを特徴とする。
【選択図】 図8
Description
高分子材料で構成された板状のコア本体と、主面間を貫通する貫通孔あるいは一方の主面に開口する凹部として形成された副コア収容部の内部に収容され、セラミックで構成された板状のセラミック副コアと、を含むコア基板と、該コア基板の主面上に高分子材料で構成された誘電体層と導体層とが交互に積層して形成された配線積層部とを備え、セラミック副コアが自身に組込まれたコンデンサとそれに接続する主面上の導体パッドとを有する配線基板であって、
導体パッドの表面にはCuメッキ層が形成され、且つ、当該Cuメッキ層の表面が高分子材料との密着性を向上させるための表面化学処理が施された処理面とされ、当該処理面に配線積層部の最下層の誘電体層及びそれに貫通形成されたビア導体が接触してなることを特徴とする。
導体パッドの表面にCuメッキ層が形成されたセラミック副コアを副コア収容部内に収容する副コア収容工程と、
セラミック副コアが収容されたコア基板の主面上に誘電体層と導体層とを交互に積層して配線積層部を形成する配線積層工程と、
をこの順に含み、且つ、
副コア収容工程前、または、副コア収容工程と配線積層工程の間に、導体パッドの表面に形成されたCuメッキ層に対し、高分子材料との密着性を向上させるための表面化学処理を施す表面処理工程を含むことを特徴とする。
主面間を貫通する貫通孔あるいは一方の主面に開口する凹部として形成された副コア収容部を有するコア本体と、
コア主面上に導体パッドが形成され、該副コア収容部の内部に収容されたセラミック副コアと、
を含むコア基板と、
該コア基板の主面上に形成され、ビア導体が貫通形成された誘電体層と、導体層とを交互に積層してなる配線積層部と
を備える配線基板であって、
導体パッドの表面にはオーバーコート層が形成され、且つ、当該オーバーコート層の表面が粗化面とされ、配線積層部のコア基板上に位置する誘電体層及びそれに貫通形成されたビア導体が当該粗化面接触してなることを特徴とする。
本発明の配線基板の第1実施形態を、図面を参照しながら説明する。図1は、配線基板1の断面構造を概略的に表す図である。なお、本実施形態において板状の部材は、図中で上側に表れている面を第1主面MP1とし、下側に表れている面を第2主面MP2とする。配線基板1は、コア基板CBのうち半田バンプ7の下部領域に、薄膜コンデンサ3Cが第1主面MP1側に形成されたセラミック副コア3を有しており、半導体集積回路素子(ICチップ)Cのスイッチングノイズの低減や動作電源電圧の安定化を図るうえで、ICチップCと薄膜コンデンサ3Cとの間の配線長の短縮化により、配線のインダクタンス成分の減少に寄与している。また、高分子材料からなるコア本体2よりも線膨張係数の小さいセラミックからなるセラミック副コア3が、コア基板CBのうち半田バンプ7の下部領域に設けられることにより、ICチップCとの線膨張係数差を縮減し、熱応力による断線等を生じ難くしている。以下、詳細な説明を行う。
本発明の配線基板の第2実施形態(配線基板1’)について説明する。以下、主に配線基板1と異なる箇所について述べ、重複する箇所については図中に同番号を付して説明を省略する。図13に示す配線基板1’は、セラミック副コア3’の全体が積層セラミックコンデンサとして構成されている。この積層セラミックコンデンサは、第1実施形態(配線基板1)における薄膜コンデンサ3Cと同様の積層構造を有しており、電源端子7aに対応する電源側電極導体層と、グランド端子7bに対応するグランド側電極導体層との互いに直流的に分離された2種類の電極導体層36’,37’が、セラミック層33により隔てられた形で積層方向に交互に配列している。
次に、本発明の配線基板の製造方法の実施形態を、図面を参照しながら説明する。図4〜図7は、配線基板1の製造工程を表す図である。
2 コア本体
25 副コア収容部
3 セラミック副コア
4 充填樹脂
6 ビア導体
7 半田バンプ
CB コア基板
L1,L2 配線積層部
Claims (16)
- 高分子材料で構成された板状のコア本体と、主面間を貫通する貫通孔あるいは一方の主面に開口する凹部として形成された副コア収容部の内部に収容され、セラミックで構成された板状のセラミック副コアと、を含むコア基板と、該コア基板の主面上に高分子材料で構成された誘電体層と導体層とが交互に積層して形成された配線積層部とを備え、前記セラミック副コアが自身に組込まれたコンデンサとそれに接続する主面上の導体パッドとを有する配線基板であって、
前記導体パッドの表面にはCuメッキ層が形成され、且つ、当該Cuメッキ層の表面が高分子材料との密着性を向上させるための表面化学処理が施された処理面とされ、当該処理面に前記配線積層部の最下層の前記誘電体層及びそれに貫通形成されたビア導体が接触してなることを特徴とする配線基板。 - 前記処理面が、前記表面化学処理としてCu粗化処理が施された粗化面である請求項1に記載の配線基板。
- 前記処理面が、前記表面化学処理としてCuとSnを含む合金からなる接着層の形成処理が施された接着層形成面である請求項1に記載の配線基板。
- 主面間を貫通する貫通孔あるいは一方の主面に開口する凹部として形成された副コア収容部を有するコア本体と、
コア主面上に導体パッドが形成され、該副コア収容部の内部に収容されたセラミック副コアと、
を含むコア基板と、
該コア基板の主面上に形成され、ビア導体が貫通形成された誘電体層と、導体層とを交互に積層してなる配線積層部と
を備える配線基板であって、
前記導体パッドの表面にはオーバーコート層が形成され、且つ、当該オーバーコート層の表面が粗化面とされ、前記配線積層部の前記コア基板上に位置する前記誘電体層及びそれに貫通形成された前記ビア導体が当該粗化面に接触してなることを特徴とする配線基板。 - 前記オーバーコート層は、前記導体パッドの上面部分のみが前記粗化面とされてなる請求項4に記載の配線基板。
- 前記オーバーコート層はCuからなる層とされてなる請求項4または5に記載の配線基板。
- 前記導体パッドは、Cuとは異なる金属を主成分とする金属材料から構成されてなる請求項1ないし3,6のいずれか1項に記載の配線基板。
- 前記導体パッドは、Ag,Pt,Au,Ni,Mo,Wのうち少なくともいずれかを主成分とする請求項7に記載の配線基板。
- 前記導体パッドは、Cuを主成分とし、且つ、前記Cuメッキ層よりもCu含有量の低い金属材料から構成されてなる請求項1ないし3,6のいずれか1項に記載の配線基板。
- 前記セラミック副コアは、前記コンデンサとして、直流的に互いに分離された第1電極導体薄膜と第2電極導体薄膜とが誘電体薄膜を挟んで交互に成膜された薄膜コンデンサを一方の主面に有してなり、
当該薄膜コンデンサの表面に形成された前記導体パッドは、Ag,Pt,Auのいずれかを主成分とする成膜層で構成され、その表面に前記Cuメッキ層が形成されてなる請求項1ないし3,6ないし9のいずれか1項に記載の配線基板。 - 前記セラミック副コアは、その全体が前記コンデンサとして、直流的に互いに分離された第1電極導体層と第2電極導体層とが、セラミックからなる誘電体層を挟んで交互に積層された積層セラミックコンデンサとされてなり、
当該積層セラミックコンデンサに接続された前記導体パッドは、NiまたはAgを主成分とするメタライズパッドで構成され、その表面に前記Cuメッキ層が形成されてなる請求項1ないし3,6ないし9のいずれか1項に記載の配線基板。 - 高分子材料で構成された板状のコア本体と、主面間を貫通する貫通孔あるいは一方の主面に開口する凹部として形成された副コア収容部の内部に収容され、セラミックで構成された板状のセラミック副コアと、を含むコア基板と、該コア基板の主面上に高分子材料で構成された誘電体層と導体層とが交互に積層して形成された配線積層部とを備え、前記セラミック副コアが自身に組込まれたコンデンサとそれに接続する主面上の導体パッドとを有する配線基板の製造方法であって、
前記導体パッドの表面にCuメッキ層が形成された前記セラミック副コアを前記副コア収容部内に収容する副コア収容工程と、
前記セラミック副コアが収容された前記コア基板の主面上に前記誘電体層と前記導体層とを交互に積層して前記配線積層部を形成する配線積層工程と、
をこの順に含み、且つ、
前記副コア収容工程前、または、前記副コア収容工程と前記配線積層工程の間に、前記導体パッドの表面に形成された前記Cuメッキ層に対し、高分子材料との密着性を向上させるための表面化学処理を施す表面処理工程を含むことを特徴とする配線基板の製造方法。 - 前記表面処理工程における前記表面化学処理は、前記Cuメッキ層の表面を粗化面とするCu粗化処理である請求項12に記載の配線基板の製造方法。
- 前記表面処理工程における前記表面化学処理は、前記Cuメッキ層の表面を接着層形成面とするCuとSnを含む合金からなる接着層の形成処理である請求項12に記載の配線基板の製造方法。
- 前記副コア収容工程前に、前記セラミック副コアが有する前記導体パッドの表面に前記Cuメッキ層を形成するパッドメッキ工程を含む請求項12ないし14のいずれか1項に記載の配線基板の製造方法。
- 前記副コア収容工程前に、前記コア本体の主面間を貫通する貫通孔として形成された前記副コア収容部の第2主面側の開口を、表面に粘着剤を有するシート材で、該粘着剤が前記副コア収容部の内側に露出するように塞ぐ閉塞工程を含み、
前記副コア収容工程では、前記セラミック副コアを、前記副コア収容部の第1主面側の開口から収容するとともに前記粘着剤に固着させ、
前記副コア収容工程後に、前記コア本体と前記セラミック副コアの隙間に充填樹脂を注入して硬化させる充填硬化工程を含む請求項12ないし15のいずれか1項に記載の配線基板の製造方法。
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US11/447,018 US7525814B2 (en) | 2005-06-15 | 2006-06-06 | Wiring board and method for manufacturing the same |
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JP2011119628A (ja) * | 2009-12-01 | 2011-06-16 | Samsung Electro-Mechanics Co Ltd | 電子部品内装型プリント基板及びその製造方法 |
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