JP2009135453A - 半導体装置の作製方法、半導体装置及び電子機器 - Google Patents

半導体装置の作製方法、半導体装置及び電子機器 Download PDF

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Publication number
JP2009135453A
JP2009135453A JP2008273215A JP2008273215A JP2009135453A JP 2009135453 A JP2009135453 A JP 2009135453A JP 2008273215 A JP2008273215 A JP 2008273215A JP 2008273215 A JP2008273215 A JP 2008273215A JP 2009135453 A JP2009135453 A JP 2009135453A
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layer
region
semiconductor layer
substrate
single crystal
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Japanese (ja)
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JP2009135453A5 (enExample
Inventor
Akihisa Shimomura
明久 下村
Junpei Momo
純平 桃
Fumito Isaka
史人 井坂
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2008273215A priority Critical patent/JP2009135453A/ja
Publication of JP2009135453A publication Critical patent/JP2009135453A/ja
Publication of JP2009135453A5 publication Critical patent/JP2009135453A5/ja
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

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  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)
  • Electroluminescent Light Sources (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Recrystallisation Techniques (AREA)
JP2008273215A 2007-10-30 2008-10-23 半導体装置の作製方法、半導体装置及び電子機器 Withdrawn JP2009135453A (ja)

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JP2008273215A JP2009135453A (ja) 2007-10-30 2008-10-23 半導体装置の作製方法、半導体装置及び電子機器

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JP2007281631 2007-10-30
JP2008273215A JP2009135453A (ja) 2007-10-30 2008-10-23 半導体装置の作製方法、半導体装置及び電子機器

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JP2009135453A true JP2009135453A (ja) 2009-06-18
JP2009135453A5 JP2009135453A5 (enExample) 2011-11-17

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US (1) US8435871B2 (enExample)
JP (1) JP2009135453A (enExample)

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KR101240008B1 (ko) * 2009-11-11 2013-03-06 실트로닉 아게 반도체 웨이퍼를 연마하는 방법
JP2014029992A (ja) * 2012-06-25 2014-02-13 Semiconductor Energy Lab Co Ltd 機能性基板の作製方法および半導体装置の作製方法
JP2014107393A (ja) * 2012-11-27 2014-06-09 Mitsubishi Heavy Ind Ltd 常温接合デバイス、常温接合デバイスを有するウェハおよび常温接合方法

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JP5464192B2 (ja) * 2011-09-29 2014-04-09 株式会社デンソー 半導体装置の製造方法
US9472776B2 (en) 2011-10-14 2016-10-18 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing sealed structure including welded glass frits
JP2013101923A (ja) 2011-10-21 2013-05-23 Semiconductor Energy Lab Co Ltd 分散組成物の加熱方法、及びガラスパターンの形成方法
TWI695525B (zh) * 2014-07-25 2020-06-01 日商半導體能源研究所股份有限公司 剝離方法、發光裝置、模組以及電子裝置
US10224233B2 (en) 2014-11-18 2019-03-05 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed by He-N2 co-implantation
EP3221885B1 (en) 2014-11-18 2019-10-23 GlobalWafers Co., Ltd. High resistivity semiconductor-on-insulator wafer and a method of manufacturing
JP6517360B2 (ja) 2015-03-03 2019-05-22 サンエディソン・セミコンダクター・リミテッドＳｕｎＥｄｉｓｏｎ Ｓｅｍｉｃｏｎｄｕｃｔｏｒ Ｌｉｍｉｔｅｄ 膜応力を制御可能なシリコン基板の上に電荷トラップ用多結晶シリコン膜を成長させる方法
CN114496732B (zh) 2015-06-01 2023-03-03 环球晶圆股份有限公司 制造绝缘体上硅锗的方法
EP3378094B1 (en) 2015-11-20 2021-09-15 Globalwafers Co., Ltd. Manufacturing method of smoothing a semiconductor surface
JP6416140B2 (ja) * 2016-02-12 2018-10-31 信越化学工業株式会社 多結晶シリコン棒および多結晶シリコン棒の選別方法
WO2017155804A1 (en) * 2016-03-07 2017-09-14 Sunedison Semiconductor Limited Method of manufacturing a semiconductor on insulator structure by a pressurized bond treatment
US10573550B2 (en) * 2016-03-07 2020-02-25 Globalwafers Co., Ltd. Semiconductor on insulator structure comprising a plasma oxide layer and method of manufacture thereof
WO2017155808A1 (en) * 2016-03-07 2017-09-14 Sunedison Semiconductor Limited Semiconductor on insulator structure comprising a plasma nitride layer and method of manufacture thereof
EP3995608A1 (en) 2016-06-08 2022-05-11 GlobalWafers Co., Ltd. High resistivity single crystal silicon ingot and wafer having improved mechanical strength
US10269617B2 (en) 2016-06-22 2019-04-23 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising an isolation region
CN112262467B (zh) 2018-06-08 2024-08-09 环球晶圆股份有限公司 将硅薄层移转的方法
JP7647146B2 (ja) * 2021-02-17 2025-03-18 富士電機株式会社 炭化珪素半導体装置および炭化珪素半導体装置の製造方法
CN120962514B (zh) * 2025-10-23 2026-01-06 苏州大学 一种基于数控路径规划与过程优化的光学元件成形方法

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KR101240008B1 (ko) * 2009-11-11 2013-03-06 실트로닉 아게 반도체 웨이퍼를 연마하는 방법
KR20120127236A (ko) * 2011-05-12 2012-11-21 가부시키가이샤 한도오따이 에네루기 켄큐쇼 발광 장치 및 발광 장치를 이용한 전자 기기
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