JP2009027146A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2009027146A5 JP2009027146A5 JP2008138376A JP2008138376A JP2009027146A5 JP 2009027146 A5 JP2009027146 A5 JP 2009027146A5 JP 2008138376 A JP2008138376 A JP 2008138376A JP 2008138376 A JP2008138376 A JP 2008138376A JP 2009027146 A5 JP2009027146 A5 JP 2009027146A5
- Authority
- JP
- Japan
- Prior art keywords
- spacer
- mask
- lines
- etching
- group
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 125000006850 spacer group Chemical group 0.000 claims 55
- 238000000034 method Methods 0.000 claims 35
- 238000005530 etching Methods 0.000 claims 15
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims 8
- 239000004065 semiconductor Substances 0.000 claims 8
- 229910052581 Si3N4 Inorganic materials 0.000 claims 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 6
- 238000000151 deposition Methods 0.000 claims 6
- 238000003780 insertion Methods 0.000 claims 6
- 230000037431 insertion Effects 0.000 claims 6
- 239000000463 material Substances 0.000 claims 6
- 238000001020 plasma etching Methods 0.000 claims 6
- 229910052710 silicon Inorganic materials 0.000 claims 6
- 239000010703 silicon Substances 0.000 claims 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims 6
- 229910052814 silicon oxide Inorganic materials 0.000 claims 6
- 238000001039 wet etching Methods 0.000 claims 5
- 238000000059 patterning Methods 0.000 claims 4
- 229920002120 photoresistant polymer Polymers 0.000 claims 4
- 238000001312 dry etching Methods 0.000 claims 3
- 238000004519 manufacturing process Methods 0.000 claims 3
- 238000009966 trimming Methods 0.000 claims 2
- 238000003860 storage Methods 0.000 claims 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims 1
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US93261807P | 2007-06-01 | 2007-06-01 | |
| US60/932,618 | 2007-06-01 | ||
| US11/875,205 | 2007-10-19 | ||
| US11/875,205 US7846849B2 (en) | 2007-06-01 | 2007-10-19 | Frequency tripling using spacer mask having interposed regions |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2009027146A JP2009027146A (ja) | 2009-02-05 |
| JP2009027146A5 true JP2009027146A5 (enExample) | 2011-07-14 |
| JP5236996B2 JP5236996B2 (ja) | 2013-07-17 |
Family
ID=39739769
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2008138376A Expired - Fee Related JP5236996B2 (ja) | 2007-06-01 | 2008-05-27 | 介挿領域を有するスペーサマスクを用いた頻度の3倍化 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US7846849B2 (enExample) |
| EP (1) | EP1998362A2 (enExample) |
| JP (1) | JP5236996B2 (enExample) |
| KR (1) | KR100991339B1 (enExample) |
| CN (1) | CN101315515B (enExample) |
| SG (1) | SG148135A1 (enExample) |
| TW (1) | TWI381424B (enExample) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7807578B2 (en) * | 2007-06-01 | 2010-10-05 | Applied Materials, Inc. | Frequency doubling using spacer mask |
| KR101203201B1 (ko) * | 2008-06-13 | 2012-11-21 | 도쿄엘렉트론가부시키가이샤 | 반도체 장치의 제조 방법 |
| US9953885B2 (en) * | 2009-10-27 | 2018-04-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | STI shape near fin bottom of Si fin in bulk FinFET |
| US7923305B1 (en) * | 2010-01-12 | 2011-04-12 | Sandisk 3D Llc | Patterning method for high density pillar structures |
| US8828885B2 (en) | 2013-01-04 | 2014-09-09 | Taiwan Semiconductor Manufacturing Company Limited | Photo resist trimmed line end space |
| US8865600B2 (en) * | 2013-01-04 | 2014-10-21 | Taiwan Semiconductor Manufacturing Company Limited | Patterned line end space |
| CN104425223B (zh) * | 2013-08-28 | 2017-11-03 | 中芯国际集成电路制造(上海)有限公司 | 图形化方法 |
| US9070630B2 (en) * | 2013-11-26 | 2015-06-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Mechanisms for forming patterns |
| US9524878B2 (en) * | 2014-10-02 | 2016-12-20 | Macronix International Co., Ltd. | Line layout and method of spacer self-aligned quadruple patterning for the same |
| CN105590894B (zh) * | 2014-11-12 | 2018-12-25 | 旺宏电子股份有限公司 | 线路布局以及线路布局的间隙壁自对准四重图案化的方法 |
| CN107785247A (zh) * | 2016-08-24 | 2018-03-09 | 中芯国际集成电路制造(上海)有限公司 | 金属栅极及半导体器件的制造方法 |
| US10566194B2 (en) * | 2018-05-07 | 2020-02-18 | Lam Research Corporation | Selective deposition of etch-stop layer for enhanced patterning |
| US10811256B2 (en) * | 2018-10-16 | 2020-10-20 | Asm Ip Holding B.V. | Method for etching a carbon-containing feature |
| KR102863979B1 (ko) * | 2019-04-08 | 2025-09-23 | 어플라이드 머티어리얼스, 인코포레이티드 | 포토레지스트 프로파일들을 개질하고 임계 치수들을 튜닝하기 위한 방법들 |
| CN112309838B (zh) * | 2019-07-31 | 2023-07-28 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构及其形成方法 |
| US12068168B2 (en) * | 2022-02-17 | 2024-08-20 | Taiwan Semiconductor Manufacturing Co., Ltd. | Processes for reducing line-end spacing |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5328810A (en) | 1990-05-07 | 1994-07-12 | Micron Technology, Inc. | Method for reducing, by a factor or 2-N, the minimum masking pitch of a photolithographic process |
| KR100354440B1 (ko) * | 2000-12-04 | 2002-09-28 | 삼성전자 주식회사 | 반도체 장치의 패턴 형성 방법 |
| JP4235404B2 (ja) * | 2002-06-12 | 2009-03-11 | キヤノン株式会社 | マスクの製造方法 |
| US6924191B2 (en) | 2002-06-20 | 2005-08-02 | Applied Materials, Inc. | Method for fabricating a gate structure of a field effect transistor |
| JP2004207385A (ja) * | 2002-12-24 | 2004-07-22 | Rohm Co Ltd | マスク、その製造方法およびこれを用いた半導体装置の製造方法 |
| DE10345455A1 (de) * | 2003-09-30 | 2005-05-04 | Infineon Technologies Ag | Verfahren zum Erzeugen einer Hartmaske und Hartmasken-Anordnung |
| JP2005203672A (ja) * | 2004-01-19 | 2005-07-28 | Sony Corp | 半導体装置の製造方法 |
| US7064078B2 (en) * | 2004-01-30 | 2006-06-20 | Applied Materials | Techniques for the use of amorphous carbon (APF) for various etch and litho integration scheme |
| US7115525B2 (en) | 2004-09-02 | 2006-10-03 | Micron Technology, Inc. | Method for integrated circuit fabrication using pitch multiplication |
| CN1832109A (zh) * | 2005-03-08 | 2006-09-13 | 联华电子股份有限公司 | 掩模的制造方法与图案化制造方法 |
| US7253118B2 (en) * | 2005-03-15 | 2007-08-07 | Micron Technology, Inc. | Pitch reduced patterns relative to photolithography features |
| KR100674970B1 (ko) * | 2005-04-21 | 2007-01-26 | 삼성전자주식회사 | 이중 스페이서들을 이용한 미세 피치의 패턴 형성 방법 |
| US7560390B2 (en) * | 2005-06-02 | 2009-07-14 | Micron Technology, Inc. | Multiple spacer steps for pitch multiplication |
| KR100752674B1 (ko) * | 2006-10-17 | 2007-08-29 | 삼성전자주식회사 | 미세 피치의 하드마스크 패턴 형성 방법 및 이를 이용한반도체 소자의 미세 패턴 형성 방법 |
-
2007
- 2007-10-19 US US11/875,205 patent/US7846849B2/en not_active Expired - Fee Related
-
2008
- 2008-05-27 TW TW097119558A patent/TWI381424B/zh not_active IP Right Cessation
- 2008-05-27 JP JP2008138376A patent/JP5236996B2/ja not_active Expired - Fee Related
- 2008-05-28 SG SG200804042-0A patent/SG148135A1/en unknown
- 2008-05-29 EP EP08157220A patent/EP1998362A2/en not_active Withdrawn
- 2008-05-29 KR KR1020080050414A patent/KR100991339B1/ko not_active Expired - Fee Related
- 2008-05-30 CN CN2008100983623A patent/CN101315515B/zh not_active Expired - Fee Related
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2009027146A5 (enExample) | ||
| JP2010503995A5 (enExample) | ||
| CN104900495B (zh) | 自对准双重图形化方法及鳍式场效应晶体管的制作方法 | |
| JP2007134668A (ja) | 半導体素子のトレンチ形成方法及びそれを利用した半導体素子の素子分離方法 | |
| JP2007311584A5 (enExample) | ||
| KR20150101398A (ko) | 기판 내 반도체 장치의 핀 구조체 제조방법 | |
| WO2005060548A3 (en) | Method of preventing damage to porous low-k materials during resist stripping | |
| CN104078366B (zh) | 双重图形化鳍式晶体管的鳍结构制造方法 | |
| KR20120004217A (ko) | 반도체 장치의 콘택 홀 제조 방법 | |
| JP2009027146A (ja) | 介挿領域を有するスペーサマスクを用いた頻度の3倍化 | |
| JP2009071306A (ja) | 半導体素子の微細パターン形成方法 | |
| US11664234B2 (en) | Semiconductor structure and fabrication method thereof | |
| CN102751245B (zh) | 制造非易失性存储器件的方法 | |
| CN110838449A (zh) | 鳍体的制造方法 | |
| JP2005526399A5 (enExample) | ||
| JP2008500727A5 (enExample) | ||
| JP4139380B2 (ja) | 半導体デバイスにおいてアイソレーション膜を形成する方法 | |
| CN109872946B (zh) | 半导体装置的形成方法 | |
| CN105679781A (zh) | 电容的制造方法、以及cmos图像传感器的制造方法 | |
| KR100831571B1 (ko) | 플래시 소자 및 이의 제조 방법 | |
| JP2005191567A (ja) | 半導体素子のコンタクト形成方法 | |
| CN112151448A (zh) | 半导体结构的形成方法 | |
| JP2002164426A5 (enExample) | ||
| JP5013708B2 (ja) | 半導体素子の製造方法 | |
| CN104538360B (zh) | 一种闪存的存储单元栅极制备方法 |