JP2008258619A - ラミネートキャパシタの配線構造 - Google Patents
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- 239000003990 capacitor Substances 0.000 title claims abstract description 115
- 230000000153 supplemental effect Effects 0.000 claims abstract description 67
- 239000003989 dielectric material Substances 0.000 claims description 5
- 239000000758 substrate Substances 0.000 claims description 2
- 230000003071 parasitic effect Effects 0.000 description 11
- 239000004020 conductor Substances 0.000 description 9
- 238000000034 method Methods 0.000 description 6
- 229910000679 solder Inorganic materials 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 238000003475 lamination Methods 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 238000005553 drilling Methods 0.000 description 4
- 238000009713 electroplating Methods 0.000 description 2
- 238000004377 microelectronic Methods 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/162—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/07—Electric details
- H05K2201/0776—Resistance and impedance
- H05K2201/0792—Means against parasitic impedance; Means against eddy currents
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/0929—Conductive planes
- H05K2201/09309—Core having two or more power planes; Capacitive laminate of two power planes
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09536—Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09636—Details of adjacent, not connected vias
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
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- H—ELECTRICITY
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
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- H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
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- Production Of Multi-Layered Print Wiring Board (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Ceramic Capacitors (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
【解決手段】 このラミネートキャパシタは、多数の導電層と、ラミネートキャパシタの厚さ方向に沿って延在し、上部導電層から下部導電層に延在するように配列される電源バイアと、ラミネートキャパシタの厚さ方向に沿って延在し、上部導電層から下部導電層に延在するように配列される接地バイアとを含む。導電層は、第1導電層の集合および第2導電層の集合を含む。電源バイアは第1導電層に電気的に結合され、接地バイアは第2導電層に電気的に結合される。ラミネートキャパシタは、電源バイアと接地バイアとの間に補足バイアをさらに含む。補足バイアは、電源バイアおよび接地バイアより長さが短い。補足バイアは、第1導電層および第2導電層の一方に電気的に結合される。
【選択図】 なし
Description
このようにして、内部電極を貫流する電流によって誘発される磁界は偏位し、電流経路の長さは短くなる。したがって、ESL値は減少する。
28’ 導電層
30’ 導電層
34’ 電源リード
36’ 接地リード
28’ 導電層
41 ラミネートキャパシタ
44 内部電極
45 内部電極
46 貫通接続導体
47 貫通接続導体
400 多層キャパシタ、ラミネートキャパシタ
410 第1電極
420 第2電極
430 誘電体層
430a 誘電体層
430b 誘電体層
430c 誘電体層
440 電源バイア
450 接地バイア
460 補足バイア
460a 補足バイア
460b 補足バイア
500 ラミネートキャパシタ
600 多層キャパシタ
700 マイクロプロセッサ
710 集積回路
720 回路基板
730 ラミネートキャパシタ
732a 電極
732b 電極
734a 電源バイア
734b 接地バイア
736 補足バイア
738 誘電体層
740 配線盤
750a 電源面
750b 接地面
760 はんだバンプ
770 はんだパッド
Claims (19)
- ラミネートキャパシタであって、
上部導電層および下部導電層を含む多数の導電層であって、前記導電層が第1導電層の集合および第2導電層の集合を含む導電層と、
前記ラミネートキャパシタの厚さ方向に沿って延在し、前記上部導電層から前記下部導電層に延在するように配列される電源バイア(power via)であって、前記電源バイアが、前記第1導電層に電気的に結合される電源バイアと、
前記ラミネートキャパシタの厚さ方向に沿って延在し、前記上部導電層から前記下部導電層に延在するように配列される接地バイア(ground via)であって、前記接地バイアが、前記第2導電層に電気的に結合される接地バイアと、
前記電源バイアと前記接地バイアとの間の補足バイア(supplemental via)であって、前記補足バイアが、前記電源バイアおよび前記接地バイアより長さが短く、前記第1導電層および前記第2導電層の一方に電気的に結合される補足バイアと、
を備えるラミネートキャパシタ。 - 前記電源バイア、前記接地バイア、および前記補足バイアが、円筒状バイア、任意のその他の形状のバイア、およびこれらの組合せから選択される形状である、請求項1に記載のキャパシタ。
- 前記補足バイアが、電源バイアおよび接地バイアの何れが前記補足バイアに比較的近く配置されるかに応じて、前記第1導電層および前記第2導電層の一方に電気的に結合される、請求項1に記載のキャパシタ。
- 前記補足バイアが前記接地バイアに比較的近く配置される場合、前記補足バイアが前記第1導電層に電気的に結合される、請求項1に記載のキャパシタ。
- 前記補足バイアが前記電源バイアに比較的近く配置される場合、前記補足バイアが前記第2導電層に電気的に結合される、請求項1に記載のキャパシタ。
- 回路基板内に埋め込まれたラミネートキャパシタであって、
上部導電層および下部導電層を含む多数の導電層であって、前記導電層が、第1導電層の集合および第2導電層の集合を含む導電層と、
前記ラミネートキャパシタの厚さ方向に沿って延在し、前記上部導電層から前記下部導電層に延在するように配列される電源バイアであって、前記電源バイアが、前記第1導電層に電気的に結合される電源バイアと、
前記ラミネートキャパシタの厚さ方向に沿って延在し、前記上部導電層から前記下部導電層に延在するように配列される接地バイアであって、前記接地バイアが、前記第2導電層に電気的に結合される接地バイアと、
前記電源バイアと前記接地バイアとの間の補足バイアであって、前記補足バイアが、前記電源バイアおよび前記接地バイアより長さが短く、前記第1導電層および前記第2導電層の一方に電気的に結合される補足バイアと、
多数の誘電体層であって、各々の誘電体層が、2つの隣接する導電層の間に挟まれる誘電体層と、
を含むラミネートキャパシタ。 - 前記誘電体層が、誘電率が異なる誘電材料から形成される、請求項6に記載のキャパシタ。
- 前記電源バイア、前記接地バイア、および前記補足バイアが、円筒状バイア、任意のその他の形状のバイア、およびこれらの組合せから選択される、請求項6に記載のキャパシタ。
- 前記補足バイアが、電源バイアおよび接地バイアの何れが前記補足バイアに比較的近く配置されるかに応じて、前記第1導電層および前記第2導電層の一方に電気的に結合される、請求項6に記載のキャパシタ。
- 前記補足バイアが前記電源バイアに比較的近く配置される場合、前記補足バイアが前記第2導電層に電気的に結合される、請求項6に記載のキャパシタ。
- 前記補足バイアが前記接地バイアに比較的近く配置される場合、前記補足バイアが前記第1導電層に電気的に結合される、請求項6に記載のキャパシタ。
- 集積回路チップが電気的に結合される集積回路基板であって、
電源面および接地面を含む配線盤と、
前記電源面および接地面に電気的に結合されるラミネートキャパシタと、
を備え、
前記ラミネートキャパシタが、
上部導電層および下部導電層を含む多数の導電層であって、前記導電層が、第1導電層の集合および第2導電層の集合を含む導電層と、
前記ラミネートキャパシタの厚さ方向に沿って延在し、前記上部導電層から前記下部導電層に延在するように配列される電源バイアであって、前記電源バイアが、前記第1導電層に電気的に結合される電源バイアと、
前記ラミネートキャパシタの厚さ方向に沿って延在し、前記上部導電層から前記下部導電層に延在するように配列される接地バイアであって、前記接地バイアが、前記第2導電層に電気的に結合される接地バイアと、
前記電源バイアと前記接地バイアとの間の補足バイアであって、前記補足バイアが、前記電源バイアおよび前記接地バイアより長さが短く、前記第1導電層および前記第2導電層の一方に電気的に結合される補足バイアと、
多数の誘電体層であって、各々の誘電体層が、2つの隣接する導電層の間に挟まれる誘電体層と、
を含むラミネートキャパシタと、
を備える集積回路チップ。 - 前記接地バイアが前記接地面に電気的に結合され、前記補足バイアが前記電源面に電気的に結合される、請求項12に記載の集積回路基板。
- 前記電源バイアが前記電源面に電気的に結合され、前記補足バイアが前記接地面に電気的に結合される、請求項12に記載の集積回路基板。
- 前記多数の誘電体層が、誘電率が異なる誘電材料から形成される、請求項12に記載の集積回路基板。
- 前記電源バイア、前記接地バイア、および前記補足バイアが、円筒状バイア、任意のその他の形状のバイア、およびこれらの組合せから選択される形状である、請求項12に記載の集積回路基板。
- 前記補足バイアが、電源バイアおよび接地バイアの何れが、前記補足バイアに比較的近く配置されるかに応じて、前記第1導電層および前記第2導電層の一方に電気的に結合される、請求項12に記載の集積回路基板。
- 前記補足バイアが前記電源バイアに比較的近く配置される場合、前記補足バイアが前記第2導電層に電気的に結合される、請求項12に記載の集積回路基板。
- 前記補足バイアが前記接地バイアに比較的近く配置される場合、前記補足バイアが、前記第1導電層に電気的に結合される、請求項12に記載の集積回路基板。
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Application Number | Priority Date | Filing Date | Title |
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US90897307P | 2007-03-30 | 2007-03-30 | |
US11/950,381 US7742276B2 (en) | 2007-03-30 | 2007-12-04 | Wiring structure of laminated capacitors |
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JP2011106074A Division JP5339384B2 (ja) | 2007-03-30 | 2011-05-11 | ラミネートキャパシタおよび集積回路基板 |
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JP2008090373A Pending JP2008258619A (ja) | 2007-03-30 | 2008-03-31 | ラミネートキャパシタの配線構造 |
JP2011106074A Active JP5339384B2 (ja) | 2007-03-30 | 2011-05-11 | ラミネートキャパシタおよび集積回路基板 |
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US (1) | US7742276B2 (ja) |
JP (2) | JP2008258619A (ja) |
KR (1) | KR101013537B1 (ja) |
CN (1) | CN101295585B (ja) |
TW (1) | TWI397089B (ja) |
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US8195295B2 (en) | 2008-03-20 | 2012-06-05 | Greatbatch Ltd. | Shielded three-terminal flat-through EMI/energy dissipating filter |
US8761895B2 (en) | 2008-03-20 | 2014-06-24 | Greatbatch Ltd. | RF activated AIMD telemetry transceiver |
JP2009027044A (ja) * | 2007-07-20 | 2009-02-05 | Taiyo Yuden Co Ltd | 積層コンデンサ及びコンデンサ内蔵配線基板 |
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JP5339384B2 (ja) | 2013-11-13 |
KR101013537B1 (ko) | 2011-02-14 |
TW200839812A (en) | 2008-10-01 |
KR20080089276A (ko) | 2008-10-06 |
CN101295585B (zh) | 2012-01-11 |
JP2011211210A (ja) | 2011-10-20 |
TWI397089B (zh) | 2013-05-21 |
CN101295585A (zh) | 2008-10-29 |
US7742276B2 (en) | 2010-06-22 |
US20080239622A1 (en) | 2008-10-02 |
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