JP2005345481A - バイオアレーチップ反応装置およびその製造方法 - Google Patents

バイオアレーチップ反応装置およびその製造方法 Download PDF

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JP2005345481A
JP2005345481A JP2005227258A JP2005227258A JP2005345481A JP 2005345481 A JP2005345481 A JP 2005345481A JP 2005227258 A JP2005227258 A JP 2005227258A JP 2005227258 A JP2005227258 A JP 2005227258A JP 2005345481 A JP2005345481 A JP 2005345481A
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cavity
fluid
attached
substrate
probe array
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JP3884048B2 (ja
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Donald M Besemer
エム ベッセマー ドナルド
Virginia W Goss
ダブリュー ゴース ヴァージニア
James L Winkler
エル ウィンクラー ジェームズ
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Affymetrix Inc
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Affymetrix Inc
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Abstract

【課題】 経済的に見込みがある高スループットの基板パッケージング装置および方法の提供。
【解決手段】 第1表面および第2表面を備えた基板を有し、第1表面がプローブアレーを備え、流体キャビティを備えた取付け面をもつ本体を有し、前記第2表面が前記キャビティ内で前記プローブアレーを位置決めするように、前記本体に取り付けられている、基板のパッケージング装置でって、１つの実施形態において、前記基板は、前記キャビティ内に位置決めされた前記第1表面を含むプローブチップの形態をなしている、装置。
【選択図】 なし

Description

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第１ａ図は、複数のプローブ配列に組みたれたウェーハを示す。 第１ｂ図は、チップを示す。 第２ａ図は、罫書き／破断装置を示す。 第２ｂ図は、ピック／プレースフレームを示す。 第２ｃ図および第２ｄ図は、アライメント中に、罫書き／破断装置により表示されるウェーハを示す。 第２ｃ図および第２ｄ図は、アライメント中に、罫書き／破断装置により表示されるウェーハを示す。 第３図は、チップパッケージ装置を示す。 第４図は、２つのコンポーネンツから組み立てられたチップパッケージ装置を示す。 第５ａ図および第５ｂ図は、チップパッケージ装置の上ケーシングの、それぞれ平面図および下面図である。 第５ａ図および第５ｂ図は、チップパッケージ装置の上ケーシングの、それぞれ平面図および下面図である。 第５ｃ図は、異なるキャビティ配向を示す。 第６図は、パッケージ装置の断面図である。 第７図は、チップパッケージ装置の下ケージングの下面図である。 第８ａ図および第８ｂ図は、超音波融着装置を示す。 第８ａ図および第８ｂ図は、超音波融着装置を示す。 第９ａ図〜第９ｃ図は、チップパッケージング装置の組立てに使用される超音波融着プロセスを示す。 第９ａ図〜第９ｃ図は、チップパッケージング装置の組立てに使用される超音波融着プロセスを示す。 第９ａ図〜第９ｃ図は、チップパッケージング装置の組立てに使用される超音波融着プロセスを示す。 第１０図は、チップをチップパッケージ装置に取り付けることに使用する接着剤分与装置を示す。 第１１図〜第１３図は、第１０図の接着を整合させる手順を示す。 第１１図〜第１３図は、第１０図の接着を整合させる手順を示す。 第１１図〜第１３図は、第１０図の接着を整合させる手順を示す。 第１１図〜第１３図は、第１０図の接着を整合させる手順を示す。 第１４ａ図〜第１４ｄ図は、第１０図の装置を整合させる手順を示す。 第１４ａ図〜第１４ｄ図は、第１０図の装置を整合させる手順を示す。 第１４ａ図〜第１４ｄ図は、第１０図の装置を整合させる手順を示す。 第１４ａ図〜第１４ｄ図は、第１０図の装置を整合させる手順を示す。 第１５ａ図〜第１５ｅ図は、第１４ａ図〜第１４ｄ図の整合プロセス中に得られるイメージを示す。 第１６ａ図および第１６ｂ図は、パッケージ装置の別の実施例を示す。 第１６ａ図および第１６ｂ図は、パッケージ装置の別の実施例を示す。 第１７ａ図および第１７ｂ図は、パッケージ装置の他の実施例を示す。 第１８図は、チップをパッケージング装置に取り付ける別の実施例を示す。 第１９図は、チップをパッケージング装置に取り付ける別の実施例を示す。 第２０ａ図および第２０ｂ図は、チップをパッケージング装置に取り付けるさらに別の実施例を示す。 第２１図は、チップをパッケージング装置に取り付ける他の実施例を示す。 第２２図は、チップをパッケージング装置に取り付ける他の実施例を示す。 第２３図は、パッケージング装置のキャビティをシールする他の実施例を示す。 第２４図は、パッケージング装置のキャビティをシールする別の実施例を示す。 第２５図は、パッケージング装置のキャビティをシールする更に別の実施例を示す。 第２６ａ図および第２６ｂ図は、パッケージング装置のキャビティをシールする他の実施例を示す。 第２７ａ図および第２７ｂ図は、チップを取り付ける他の実施例を示す。 第２７ａ図および第２７ｂ図は、チップを取り付ける他の実施例を示す。 第２８図は、攪拌装置を示す。 第２９図は、攪拌装置の他の実施例を示す。 第３０図は、攪拌装置の別の実施例を示す。 第３１図は、チップパッケージング装置の他の実施例を示す。 第３２図は、第３１図のチップパッケージング装置の側面図である。 第３３図〜第３５図は、第３１図のチップパッケージング装置の詳細である。 第３３図〜第３５図は、第３１図のチップパッケージング装置の詳細である。 第３３図〜第３５図は、第３１図のチップパッケージング装置の詳細である。 第３６図は、チップパッケージング装置の更に別の実施例を示す。

Claims (25)

  1. 基板のパッケージング装置であって、
    前記装置が、
    第１表面および第２表面を備えた基板、および
    流体キャビティを備えた取付け面をもつ本体、
    を備え、
    ここで、
    前記第1表面が、プローブアレーを備え、
    前記第2表面が、前記プローブアレーを前記キャビティ内に位置決めするように、前記本体に取り付けられている、
    基板のパッケージング装置。
  2. 請求項１に記載の装置であって、ここで、
    前記基板が、プローブチップの形態で形づくられ、
    前記第１の表面が、前記キャビティ内に位置決めされており、かつ
    前記第２の表面が、前記取付け面で前記本体に取り付けられており、
    それによって、前記キャビティを密閉している、
    装置。
  3. 基板のパッケージング装置であって、
    前記装置が、
    第１の表面および第２の表面を有する基板；
    流体キャビティを備えた取付け面をもつ本体；および
    前記キャビティを密閉するための前記取付け面に取り付けられたカバー
    を備え、
    前記第1表面が、プローブアレーを備え、
    前記第2表面が、前記プローブアレーを前記キャビティ内に位置決めするように、前記本体に取り付けられている、
    基板のパッケージング装置。
  4. 請求項３に記載の装置であって、ここで、
    前記基板は、前記カバーの一部分を形成するように形づくられ、
    前記第１表面が前記キャビティ内に位置決めされ、かつ
    前記第２表面が前記取付け面に取り付けられ、
    それによって、前記キャビティを密閉する、
    装置。
  5. 請求項３に記載の装置であって、
    前記本体が、少なくとも２つの部分を備え、かつ、
    前記カバーもまた、前記本体の前記部分のうちの１つを備える、
    装置。
  6. 請求項３に記載の装置であって、
    前記キャビティは、入口ポートおよび出口ポートを備え、
    前記入口ポートおよび出口ポートによって、
    流体が、前記キャビティへ、そして、前記キャビティを介して循環することが可能となる、
    請求項３に記載の装置。
  7. 前記入口ポートおよび出口ポートが再使用可能なシールを備えている、請求項６に記載の装置。
  8. 前記プローブアレーがオリゴヌクレオチドプローブのアレーを含む、請求項３に記載の装置。
  9. 前記本体は、前記キャビティ内の反応温度を制御しかつ維持するための温度制御要素を受入れる凹部を備えている、請求項３に記載の装置。
  10. 前記本体は、互いに対して取り付けられる少なくとも2つの部分を有する、請求項３に記載の装置。
  11. 前記部分が射出成形プラスチックを含む、請求項１０に記載の装置。
  12. 請求項６に記載の装置であって、
    前記本体は、流れチャンネルを備え、
    前記流れチャンネルは、前記入口ポートおよび前記出口ポートに連絡している、
    装置。
  13. 前記流れチャンネルは、前記キャビティ内の流体をシールするための再使用可能なシールを備えている、
    請求項１２に記載の装置。
  14. 請求項３に記載の装置であって、
    前記本体は、アライメント構造をさらに備え、
    前記アライメント構造は、検出装置に設けるとき、前記本体を所望位置に維持するために使用される、
    装置。
  15. 前記アライメント構造は、複数の孔を有する、
    請求項１４に記載の装置。
  16. 前記流体キャビティ内に位置する流体を撹拌するための渦流発生器に連結可能である、
    請求項３に記載の装置。
  17. 前記流体キャビティが、撹拌装置に連結可能である、
    請求項３に記載の装置。
  18. 前記撹拌装置は、ポンプを有する、請求項３に記載の装置。
  19. 請求項１７に記載の装置であって、
    前記撹拌装置は、
    前記プローブアレーヘの前記標的分子のハイブリダイゼーションを促進するために、
    標的分子を含む流体を前記キャビティの中に流しつつ、
    前記流体キャビティに気泡を導入するように構成されている、
    装置。
  20. 前記プローブチップと関連するバーコードをさらに備える、請求項２に記載の装置。
  21. 前記バーコードは、前記本体に取り付けられている、請求項２０に記載の装置。
  22. 前記プローブチップと関連する識別ラベルを有する、請求項２に記載の装置。
  23. 前記検出装置はスキャナである、請求項１４に記載の装置。
  24. 前記スキャナは、前記少なくとも1つのプローブアレーに標識が付された標的分子の画像化が可能である、
    請求項２３に記載の装置。
  25. 図面のいずれか１つに記載の装置。
JP2005227258A 1994-06-08 2005-08-04 バイオアレーチップ反応装置およびその製造方法 Expired - Fee Related JP3884048B2 (ja)

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