JP2005159356A - フリップチップパッケージング工程における接合力が向上するフリップチップ接合方法およびこのための基板の金属積層構造 - Google Patents

フリップチップパッケージング工程における接合力が向上するフリップチップ接合方法およびこのための基板の金属積層構造 Download PDF

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JP2005159356A
JP2005159356A JP2004336518A JP2004336518A JP2005159356A JP 2005159356 A JP2005159356 A JP 2005159356A JP 2004336518 A JP2004336518 A JP 2004336518A JP 2004336518 A JP2004336518 A JP 2004336518A JP 2005159356 A JP2005159356 A JP 2005159356A
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chip
substrate
bump
bonding
flip
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JP2004336518A
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Japanese (ja)
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JP2005159356A5 (enExample
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Ja-Uk Koo
滋郁 具
Hyung-Chan Kim
亨燦 金
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    • H10W74/012—
    • H10W72/071—
    • H10W72/30—
    • H10W74/15—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147—Copper (Cu) as principal constituent
    • H10W72/01225—
    • H10W72/072—
    • H10W72/07233—
    • H10W72/07236—
    • H10W72/073—
    • H10W72/07331—
    • H10W72/241—
    • H10W72/251—
    • H10W72/252—
    • H10W72/536—
    • H10W72/5363—
    • H10W72/5366—
    • H10W72/552—
    • H10W72/5522—
    • H10W72/5524—
    • H10W72/5525—
    • H10W72/856—
    • H10W72/859—
    • H10W72/90—
    • H10W72/923—
    • H10W72/9415—
    • H10W72/952—
    • H10W74/00—
    • H10W80/301—
    • H10W90/722—
    • H10W90/724—
    • H10W90/732—
    • H10W90/734—

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  • Wire Bonding (AREA)
JP2004336518A 2003-11-25 2004-11-19 フリップチップパッケージング工程における接合力が向上するフリップチップ接合方法およびこのための基板の金属積層構造 Pending JP2005159356A (ja)

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Application Number Priority Date Filing Date Title
KR20030083891 2003-11-25

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JP2005159356A true JP2005159356A (ja) 2005-06-16
JP2005159356A5 JP2005159356A5 (enExample) 2008-01-10

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JP2004336518A Pending JP2005159356A (ja) 2003-11-25 2004-11-19 フリップチップパッケージング工程における接合力が向上するフリップチップ接合方法およびこのための基板の金属積層構造

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Country Link
US (1) US7115446B2 (enExample)
JP (1) JP2005159356A (enExample)
KR (1) KR100604334B1 (enExample)
CN (1) CN1622304A (enExample)
SG (1) SG128468A1 (enExample)
TW (1) TWI255019B (enExample)
WO (1) WO2005053013A1 (enExample)

Cited By (5)

* Cited by examiner, † Cited by third party
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JP2007035918A (ja) * 2005-07-27 2007-02-08 Denso Corp 半導体素子の実装方法
JP2007081417A (ja) * 2005-09-13 2007-03-29 Philips Lumileds Lightng Co Llc 半導体発光デバイスの相互接続
WO2011090049A1 (ja) * 2010-01-25 2011-07-28 日本航空電子工業株式会社 フリップチップ実装構造及びフリップチップ実装方法
JP2016001752A (ja) * 2015-08-25 2016-01-07 日本航空電子工業株式会社 フリップチップ実装構造、フリップチップ実装方法及びフリップチップ実装構造の使用方法
JP2021044292A (ja) * 2019-09-06 2021-03-18 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法

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US20060211233A1 (en) * 2005-03-21 2006-09-21 Skyworks Solutions, Inc. Method for fabricating a wafer level package having through wafer vias for external package connectivity and related structure
US7576426B2 (en) * 2005-04-01 2009-08-18 Skyworks Solutions, Inc. Wafer level package including a device wafer integrated with a passive component
GB2441265B (en) * 2005-06-16 2012-01-11 Imbera Electronics Oy Method for manufacturing a circuit board structure, and a circuit board structure
JP4728782B2 (ja) * 2005-11-15 2011-07-20 パナソニック株式会社 半導体装置およびその製造方法
US7408243B2 (en) * 2005-12-14 2008-08-05 Honeywell International Inc. High temperature package flip-chip bonding to ceramic
US20070141749A1 (en) * 2005-12-20 2007-06-21 Yi-Fong Lin Die attachment method for LED chip and structure thereof
JP4552916B2 (ja) * 2005-12-21 2010-09-29 株式会社大真空 圧電振動デバイス
JP4863746B2 (ja) 2006-03-27 2012-01-25 富士通株式会社 半導体装置およびその製造方法
US20070222087A1 (en) * 2006-03-27 2007-09-27 Sangdo Lee Semiconductor device with solderable loop contacts
KR100762909B1 (ko) * 2006-08-31 2007-10-08 주식회사 하이닉스반도체 플립 칩 패키지의 제조 방법
EP1978559A3 (en) * 2007-04-06 2013-08-28 Hitachi, Ltd. Semiconductor device
US20090014852A1 (en) * 2007-07-11 2009-01-15 Hsin-Hui Lee Flip-Chip Packaging with Stud Bumps
KR100896127B1 (ko) * 2007-07-20 2009-05-07 성균관대학교산학협력단 솔더가 코팅된 전해 도금 범프 및 이를 사용하는 플립칩접합 방법
TWI362525B (en) * 2007-07-31 2012-04-21 Chunghwa Picture Tubes Ltd Active device array substrate and liquid crystal display panel
US8283756B2 (en) * 2007-08-20 2012-10-09 Infineon Technologies Ag Electronic component with buffer layer
KR20150068495A (ko) * 2007-11-30 2015-06-19 스카이워크스 솔루션즈, 인코포레이티드 플립 칩 실장을 이용하는 웨이퍼 레벨 패키징
US7642135B2 (en) * 2007-12-17 2010-01-05 Skyworks Solutions, Inc. Thermal mechanical flip chip die bonding
US7749887B2 (en) 2007-12-18 2010-07-06 Micron Technology, Inc. Methods of fluxless micro-piercing of solder balls, and resulting devices
US8900931B2 (en) * 2007-12-26 2014-12-02 Skyworks Solutions, Inc. In-situ cavity integrated circuit package
US8018075B2 (en) * 2008-07-11 2011-09-13 Advanced Semiconductor Engineering, Inc. Semiconductor package, method for enhancing the bond of a bonding wire, and method for manufacturing a semiconductor package
DE102008040614A1 (de) 2008-07-22 2010-01-28 Robert Bosch Gmbh Kontaktierungsverfahren für substratbasierte Schaltungen und zugehörige Schaltungsanordnung
KR100958513B1 (ko) 2008-07-31 2010-05-17 알티전자 주식회사 전극 패드 및 그 전극 패드를 포함하는 발광 다이오드패키지
EP2340559A1 (en) * 2008-09-16 2011-07-06 Agere Systems, Inc. Pb-free solder bumps with improved mechanical properties
KR20100053016A (ko) * 2008-11-12 2010-05-20 한국과학기술원 접착제의 발열 온도 조절을 통한 전자부품간 접속 방법 및 접착제의 발열 온도 조절을 통한 전자부품간 접속 장치
TWI404198B (zh) * 2009-04-22 2013-08-01 財團法人工業技術研究院 感測器之封裝結構與封裝方法
US8476757B2 (en) * 2009-10-02 2013-07-02 Northrop Grumman Systems Corporation Flip chip interconnect method and design for GaAs MMIC applications
TWI411075B (zh) * 2010-03-22 2013-10-01 日月光半導體製造股份有限公司 半導體封裝件及其製造方法
US9406658B2 (en) 2010-12-17 2016-08-02 Advanced Semiconductor Engineering, Inc. Embedded component device and manufacturing methods thereof
TW201243930A (en) * 2011-04-21 2012-11-01 Lingsen Precision Ind Ltd Wafer dicing method
US20130087915A1 (en) * 2011-10-10 2013-04-11 Conexant Systems, Inc. Copper Stud Bump Wafer Level Package
US8618795B1 (en) * 2012-06-29 2013-12-31 General Electric Company Sensor assembly for use in medical position and orientation tracking
US8890274B2 (en) 2012-07-11 2014-11-18 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structure for CIS flip-chip bonding and methods for forming the same
KR102233334B1 (ko) 2014-04-28 2021-03-29 삼성전자주식회사 주석 도금액, 주석 도금 장치 및 상기 주석 도금액을 이용한 반도체 장치 제조 방법
US9209147B1 (en) 2014-07-17 2015-12-08 Freescale Semiconductor, Inc. Method of forming pillar bump
KR102380834B1 (ko) 2015-01-06 2022-03-31 삼성전기주식회사 인쇄회로기판, 반도체 패키지 및 이들의 제조방법
CN104576973B (zh) * 2015-01-30 2017-04-05 京东方科技集团股份有限公司 封装盖板的密封胶表面的平坦化方法及系统、封装方法
KR20160095520A (ko) 2015-02-03 2016-08-11 삼성전기주식회사 인쇄회로기판, 반도체 패키지 및 이들의 제조방법
US9683278B2 (en) 2015-06-08 2017-06-20 Infineon Technologies Ag Diffusion solder bonding using solder preforms
US10147702B2 (en) * 2016-10-24 2018-12-04 Palo Alto Research Center Incorporated Method for simultaneously bonding multiple chips of different heights on flexible substrates using anisotropic conductive film or paste
KR101880102B1 (ko) * 2017-05-30 2018-07-20 제엠제코(주) 적층식 반도체 패키지
US11495524B2 (en) * 2018-06-12 2022-11-08 Texas Instruments Incorporated QFN device having a mechanism that enables an inspectable solder joint when attached to a PWB and method of making same
US11862587B2 (en) * 2019-07-25 2024-01-02 Advanced Semiconductor Engineering, Inc. Semiconductor package structure and method of manufacturing the same
CN111009481B (zh) * 2019-12-19 2023-04-18 西北电子装备技术研究所(中国电子科技集团公司第二研究所) 芯片基板大压力倒装键合柔性加压方法
US12040260B2 (en) 2020-12-31 2024-07-16 Texas Instruments Incorporated Electronic package with surface contact wire extensions
KR102874313B1 (ko) * 2021-12-29 2025-10-22 김성진 관통홀 구비 전자 소자 본딩 방법

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JPH07115109A (ja) * 1993-10-15 1995-05-02 Nec Corp フリップチップボンディング方法及び装置
JPH08213425A (ja) * 1995-02-03 1996-08-20 Matsushita Electron Corp 半導体装置およびその製造方法
JPH1012669A (ja) * 1996-06-21 1998-01-16 Toshiba Corp フリップチップの接続方法
JPH10209218A (ja) * 1997-01-24 1998-08-07 Rohm Co Ltd 異方性導電膜を有する半導体チップの製造方法、およびこの半導体チップの実装方法
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JPH07115109A (ja) * 1993-10-15 1995-05-02 Nec Corp フリップチップボンディング方法及び装置
JPH08213425A (ja) * 1995-02-03 1996-08-20 Matsushita Electron Corp 半導体装置およびその製造方法
JPH1012669A (ja) * 1996-06-21 1998-01-16 Toshiba Corp フリップチップの接続方法
JPH10209218A (ja) * 1997-01-24 1998-08-07 Rohm Co Ltd 異方性導電膜を有する半導体チップの製造方法、およびこの半導体チップの実装方法
JPH11284028A (ja) * 1998-03-27 1999-10-15 Toshiba Corp ボンディング方法及びその装置
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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007035918A (ja) * 2005-07-27 2007-02-08 Denso Corp 半導体素子の実装方法
JP2007081417A (ja) * 2005-09-13 2007-03-29 Philips Lumileds Lightng Co Llc 半導体発光デバイスの相互接続
WO2011090049A1 (ja) * 2010-01-25 2011-07-28 日本航空電子工業株式会社 フリップチップ実装構造及びフリップチップ実装方法
JP2011151322A (ja) * 2010-01-25 2011-08-04 Japan Aviation Electronics Industry Ltd フリップチップ実装構造及びフリップチップ実装方法
JP2016001752A (ja) * 2015-08-25 2016-01-07 日本航空電子工業株式会社 フリップチップ実装構造、フリップチップ実装方法及びフリップチップ実装構造の使用方法
JP2021044292A (ja) * 2019-09-06 2021-03-18 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法
JP7257296B2 (ja) 2019-09-06 2023-04-13 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法

Also Published As

Publication number Publication date
WO2005053013A1 (en) 2005-06-09
US20050110163A1 (en) 2005-05-26
TW200520175A (en) 2005-06-16
US7115446B2 (en) 2006-10-03
TWI255019B (en) 2006-05-11
KR20050050155A (ko) 2005-05-30
KR100604334B1 (ko) 2006-08-08
SG128468A1 (en) 2007-01-30
CN1622304A (zh) 2005-06-01

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