JP2004538650A5 - - Google Patents

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Publication number
JP2004538650A5
JP2004538650A5 JP2003520006A JP2003520006A JP2004538650A5 JP 2004538650 A5 JP2004538650 A5 JP 2004538650A5 JP 2003520006 A JP2003520006 A JP 2003520006A JP 2003520006 A JP2003520006 A JP 2003520006A JP 2004538650 A5 JP2004538650 A5 JP 2004538650A5
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JP
Japan
Prior art keywords
semiconductor substrate
insulating layer
schottky
electrode
gate electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2003520006A
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English (en)
Japanese (ja)
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JP2004538650A (ja
Filing date
Publication date
Priority claimed from US09/928,124 external-priority patent/US20030032270A1/en
Application filed filed Critical
Priority claimed from PCT/US2002/025289 external-priority patent/WO2003015181A1/en
Publication of JP2004538650A publication Critical patent/JP2004538650A/ja
Publication of JP2004538650A5 publication Critical patent/JP2004538650A5/ja
Pending legal-status Critical Current

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JP2003520006A 2001-08-10 2002-08-09 基板とのショットキーコンタクトを形成する高誘電率ゲート絶縁層、ソースおよびドレインを有するトランジスタ Pending JP2004538650A (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US92816301A 2001-08-10 2001-08-10
US09/928,124 US20030032270A1 (en) 2001-08-10 2001-08-10 Fabrication method for a device for regulating flow of electric current with high dielectric constant gate insulating layer and source/drain forming schottky contact or schottky-like region with substrate
US38132002P 2002-05-16 2002-05-16
PCT/US2002/025289 WO2003015181A1 (en) 2001-08-10 2002-08-09 Transistor having high dielectric constant gate insulating layer and source and drain forming schottky contact with substrate

Publications (2)

Publication Number Publication Date
JP2004538650A JP2004538650A (ja) 2004-12-24
JP2004538650A5 true JP2004538650A5 (enExample) 2005-11-17

Family

ID=27409533

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003520006A Pending JP2004538650A (ja) 2001-08-10 2002-08-09 基板とのショットキーコンタクトを形成する高誘電率ゲート絶縁層、ソースおよびドレインを有するトランジスタ

Country Status (5)

Country Link
US (5) US6949787B2 (enExample)
EP (1) EP1417718A1 (enExample)
JP (1) JP2004538650A (enExample)
CN (1) CN100359701C (enExample)
WO (1) WO2003015181A1 (enExample)

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CN102117833B (zh) * 2011-01-19 2012-07-25 北京大学 一种梳状栅复合源mos晶体管及其制作方法
CN102732954B (zh) * 2011-03-31 2015-06-10 北京有色金属研究总院 一种单晶高k栅介质材料及其制备方法
US8796098B1 (en) * 2013-02-26 2014-08-05 Cypress Semiconductor Corporation Embedded SONOS based memory cells
JP6285668B2 (ja) * 2013-09-03 2018-02-28 株式会社東芝 半導体装置及びその製造方法
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