JP2004538650A - 基板とのショットキーコンタクトを形成する高誘電率ゲート絶縁層、ソースおよびドレインを有するトランジスタ - Google Patents

基板とのショットキーコンタクトを形成する高誘電率ゲート絶縁層、ソースおよびドレインを有するトランジスタ Download PDF

Info

Publication number
JP2004538650A
JP2004538650A JP2003520006A JP2003520006A JP2004538650A JP 2004538650 A JP2004538650 A JP 2004538650A JP 2003520006 A JP2003520006 A JP 2003520006A JP 2003520006 A JP2003520006 A JP 2003520006A JP 2004538650 A JP2004538650 A JP 2004538650A
Authority
JP
Japan
Prior art keywords
insulating layer
semiconductor substrate
schottky
contact
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2003520006A
Other languages
English (en)
Japanese (ja)
Other versions
JP2004538650A5 (enExample
Inventor
ジョン ピー． スナイダー，
ジョン エム． ラーソン，
Original Assignee
スピネカ セミコンダクター， インコーポレイテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/928,124 external-priority patent/US20030032270A1/en
Application filed by スピネカ セミコンダクター， インコーポレイテッド filed Critical スピネカ セミコンダクター， インコーポレイテッド
Publication of JP2004538650A publication Critical patent/JP2004538650A/ja
Publication of JP2004538650A5 publication Critical patent/JP2004538650A5/ja
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28194—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28176—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the definitive gate conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28185—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H10D30/0277—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming conductor-insulator-semiconductor or Schottky barrier source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/751—Insulated-gate field-effect transistors [IGFET] having composition variations in the channel regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/64—Electrodes comprising a Schottky barrier to a semiconductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/64—Electrodes comprising a Schottky barrier to a semiconductor
    • H10D64/647—Schottky drain or source electrodes for IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/683—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being parallel to the channel plane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/685—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/86—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of Schottky-barrier gate FETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213—Channel regions of field-effect devices
    • H10D62/221—Channel regions of field-effect devices of FETs
    • H10D62/235—Channel regions of field-effect devices of FETs of IGFETs
    • H10D62/314—Channel regions of field-effect devices of FETs of IGFETs having vertical doping variations 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/693—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0128—Manufacturing their channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • General Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Thin Film Transistor (AREA)
JP2003520006A 2001-08-10 2002-08-09 基板とのショットキーコンタクトを形成する高誘電率ゲート絶縁層、ソースおよびドレインを有するトランジスタ Pending JP2004538650A (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US92816301A 2001-08-10 2001-08-10
US09/928,124 US20030032270A1 (en) 2001-08-10 2001-08-10 Fabrication method for a device for regulating flow of electric current with high dielectric constant gate insulating layer and source/drain forming schottky contact or schottky-like region with substrate
US38132002P 2002-05-16 2002-05-16
PCT/US2002/025289 WO2003015181A1 (en) 2001-08-10 2002-08-09 Transistor having high dielectric constant gate insulating layer and source and drain forming schottky contact with substrate

Publications (2)

Publication Number Publication Date
JP2004538650A true JP2004538650A (ja) 2004-12-24
JP2004538650A5 JP2004538650A5 (enExample) 2005-11-17

Family

ID=27409533

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003520006A Pending JP2004538650A (ja) 2001-08-10 2002-08-09 基板とのショットキーコンタクトを形成する高誘電率ゲート絶縁層、ソースおよびドレインを有するトランジスタ

Country Status (5)

Country Link
US (5) US6949787B2 (enExample)
EP (1) EP1417718A1 (enExample)
JP (1) JP2004538650A (enExample)
CN (1) CN100359701C (enExample)
WO (1) WO2003015181A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006237512A (ja) * 2005-02-28 2006-09-07 Toshiba Corp 半導体装置

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6303479B1 (en) * 1999-12-16 2001-10-16 Spinnaker Semiconductor, Inc. Method of manufacturing a short-channel FET with Schottky-barrier source and drain contacts
EP1417718A1 (en) * 2001-08-10 2004-05-12 Spinnaker Semiconductor, Inc. Transistor having high dielectric constant gate insulating layer and source and drain forming schottky contact with substrate
US20060079059A1 (en) * 2001-08-10 2006-04-13 Snyder John P Transistor having high dielectric constant gate insulating layer and source and drain forming schottky contact with substrate
US6900481B2 (en) * 2002-02-21 2005-05-31 Intel Corporation Non-silicon semiconductor and high-k gate dielectric metal oxide semiconductor field effect transistors
US20050104152A1 (en) * 2003-09-19 2005-05-19 Snyder John P. Schottky barrier integrated circuit
EP1676305A1 (en) * 2003-10-03 2006-07-05 Spinnaker Semiconductor, Inc. Schottky-barrier mosfet manufacturing method using isotropic etch process
EP1683193A1 (en) * 2003-10-22 2006-07-26 Spinnaker Semiconductor, Inc. Dynamic schottky barrier mosfet device and method of manufacture
US7473596B2 (en) * 2003-12-19 2009-01-06 Micron Technology, Inc. Methods of forming memory cells
JP2005251801A (ja) * 2004-03-01 2005-09-15 Nec Electronics Corp 半導体装置
US7172947B2 (en) * 2004-08-31 2007-02-06 Micron Technology, Inc High dielectric constant transition metal oxide materials
US20060125121A1 (en) * 2004-12-15 2006-06-15 Chih-Hsin Ko Capacitor-less 1T-DRAM cell with Schottky source and drain
US20070001223A1 (en) * 2005-07-01 2007-01-04 Boyd Diane C Ultrathin-body schottky contact MOSFET
US7544596B2 (en) 2005-08-30 2009-06-09 Micron Technology, Inc. Atomic layer deposition of GdScO3 films as gate dielectrics
US8003470B2 (en) * 2005-09-13 2011-08-23 Infineon Technologies Ag Strained semiconductor device and method of making the same
US7821075B2 (en) * 2005-10-12 2010-10-26 Avolare 2, Llc CMOS device with zero soft error rate
JP2007142270A (ja) * 2005-11-21 2007-06-07 Toshiba Corp 半導体装置及びその製造方法
KR100699462B1 (ko) * 2005-12-07 2007-03-28 한국전자통신연구원 쇼트키 장벽 관통 트랜지스터 및 그 제조방법
US7972974B2 (en) 2006-01-10 2011-07-05 Micron Technology, Inc. Gallium lanthanide oxide films
US20080191285A1 (en) * 2007-02-09 2008-08-14 Chih-Hsin Ko CMOS devices with schottky source and drain regions
US8614124B2 (en) 2007-05-25 2013-12-24 Cypress Semiconductor Corporation SONOS ONO stack scaling
US9299568B2 (en) 2007-05-25 2016-03-29 Cypress Semiconductor Corporation SONOS ONO stack scaling
US20090140351A1 (en) * 2007-11-30 2009-06-04 Hong-Nien Lin MOS Devices Having Elevated Source/Drain Regions
US9431549B2 (en) 2007-12-12 2016-08-30 Cypress Semiconductor Corporation Nonvolatile charge trap memory device having a high dielectric constant blocking region
US7863143B2 (en) * 2008-05-01 2011-01-04 International Business Machines Corporation High performance schottky-barrier-source asymmetric MOSFETs
US9102522B2 (en) 2009-04-24 2015-08-11 Cypress Semiconductor Corporation Method of ONO integration into logic CMOS flow
US8071453B1 (en) 2009-04-24 2011-12-06 Cypress Semiconductor Corporation Method of ONO integration into MOS flow
US8368127B2 (en) * 2009-10-08 2013-02-05 Globalfoundries Singapore Pte., Ltd. Method of fabricating a silicon tunneling field effect transistor (TFET) with high drive current
CN102117833B (zh) * 2011-01-19 2012-07-25 北京大学 一种梳状栅复合源mos晶体管及其制作方法
CN102732954B (zh) * 2011-03-31 2015-06-10 北京有色金属研究总院 一种单晶高k栅介质材料及其制备方法
US8796098B1 (en) * 2013-02-26 2014-08-05 Cypress Semiconductor Corporation Embedded SONOS based memory cells
JP6285668B2 (ja) * 2013-09-03 2018-02-28 株式会社東芝 半導体装置及びその製造方法
US9412848B1 (en) * 2015-02-06 2016-08-09 Globalfoundries Inc. Methods of forming a complex GAA FET device at advanced technology nodes
CN112397508B (zh) * 2019-08-15 2022-12-27 长鑫存储技术有限公司 存储器件、半导体结构及其制造方法

Family Cites Families (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4053924A (en) 1975-02-07 1977-10-11 California Linear Circuits, Inc. Ion-implanted semiconductor abrupt junction
US4312113A (en) * 1978-10-23 1982-01-26 Eaton Corporation Method of making field-effect transistors with micron and submicron gate lengths
US4300152A (en) 1980-04-07 1981-11-10 Bell Telephone Laboratories, Incorporated Complementary field-effect transistor integrated circuit device
USRE32613E (en) 1980-04-17 1988-02-23 American Telephone And Telegraph Company, At&T Bell Laboratories Method of making contact electrodes to silicon gate, and source and drain regions, of a semiconductor device
SE8101994L (sv) 1981-03-27 1982-09-28 Tove Per Arne Elektronisk krets med schottky-felttransistor med kontaktelement med olika schottky-barrierhojd
US4485550A (en) 1982-07-23 1984-12-04 At&T Bell Laboratories Fabrication of schottky-barrier MOS FETs
US4513309A (en) 1982-11-03 1985-04-23 Westinghouse Electric Corp. Prevention of latch-up in CMOS integrated circuits using Schottky diodes
US4623912A (en) * 1984-12-05 1986-11-18 At&T Bell Laboratories Nitrided silicon dioxide layers for semiconductor integrated circuits
FR2582445B1 (fr) 1985-05-21 1988-04-08 Efcis Procede de fabrication de transistors mos a electrodes de siliciure metallique
JPS62229873A (ja) 1986-03-29 1987-10-08 Hitachi Ltd 薄膜半導体装置の製造方法
US5208472A (en) * 1988-05-13 1993-05-04 Industrial Technology Research Institute Double spacer salicide MOS device and method
US5040034A (en) 1989-01-18 1991-08-13 Nissan Motor Co., Ltd. Semiconductor device
US5140383A (en) * 1989-01-19 1992-08-18 Texas Instruments Incorporated Method for fabricating a buried Schottky logic array and apparatus produced thereby
US5079182A (en) 1990-04-02 1992-01-07 National Semiconductor Corporation Bicmos device having self-aligned well tap and method of fabrication
US5011785A (en) * 1990-10-30 1991-04-30 The United States Of America As Represented By The Secretary Of The Navy Insulator assisted self-aligned gate junction
KR960001611B1 (ko) 1991-03-06 1996-02-02 가부시끼가이샤 한도다이 에네르기 겐뀨쇼 절연 게이트형 전계 효과 반도체 장치 및 그 제작방법
US5250834A (en) 1991-09-19 1993-10-05 International Business Machines Corporation Silicide interconnection with schottky barrier diode isolation
JP3118063B2 (ja) 1992-03-23 2000-12-18 ローム株式会社 不揮発性記憶素子およびこれを利用した不揮発性記憶装置、ならびに不揮発性記憶素子の製造方法
US5323053A (en) 1992-05-28 1994-06-21 At&T Bell Laboratories Semiconductor devices using epitaxial silicides on (111) surfaces etched in (100) silicon substrates
JPH0697109A (ja) 1992-09-16 1994-04-08 Fujitsu Ltd 半導体装置
US5338698A (en) 1992-12-18 1994-08-16 International Business Machines Corporation Method of fabricating an ultra-short channel field effect transistor
US5444302A (en) 1992-12-25 1995-08-22 Hitachi, Ltd. Semiconductor device including multi-layer conductive thin film of polycrystalline material
US5478765A (en) * 1994-05-04 1995-12-26 Regents Of The University Of Texas System Method of making an ultra thin dielectric for electronic devices
US6268636B1 (en) 1994-05-31 2001-07-31 James D. Welch Operation and biasing for single device equivalent to CMOS
US5760449A (en) 1994-05-31 1998-06-02 Welch; James D. Regenerative switching CMOS system
US5663584A (en) 1994-05-31 1997-09-02 Welch; James D. Schottky barrier MOSFET systems and fabrication thereof
US5665993A (en) 1994-09-29 1997-09-09 Texas Instruments Incorporated Integrated circuit including a FET device and Schottky diode
JP2938351B2 (ja) 1994-10-18 1999-08-23 株式会社フロンテック 電界効果トランジスタ
TW304301B (enExample) 1994-12-01 1997-05-01 At & T Corp
US5805290A (en) * 1996-05-02 1998-09-08 International Business Machines Corporation Method of optical metrology of unresolved pattern arrays
TW333713B (en) 1996-08-20 1998-06-11 Toshiba Co Ltd The semiconductor device and its producing method
US6020243A (en) * 1997-07-24 2000-02-01 Texas Instruments Incorporated Zirconium and/or hafnium silicon-oxynitride gate dielectric
US5883010A (en) 1997-08-07 1999-03-16 National Semiconductor Corporation Method for protecting nonsilicided surfaces from silicide formation using spacer oxide mask
JP4213776B2 (ja) 1997-11-28 2009-01-21 光照 木村 Ｍｏｓゲートショットキートンネルトランジスタおよびこれを用いた集積回路
US5882010A (en) * 1997-12-04 1999-03-16 Geror; Lyle M. Game with rings and target
US6306712B1 (en) * 1997-12-05 2001-10-23 Texas Instruments Incorporated Sidewall process and method of implantation for improved CMOS with benefit of low CGD, improved doping profiles, and insensitivity to chemical processing
US6160282A (en) 1998-04-21 2000-12-12 Foveon, Inc. CMOS image sensor employing silicide exclusion mask to reduce leakage and improve performance
JP4360702B2 (ja) * 1998-08-07 2009-11-11 株式会社ルネサステクノロジ 半導体装置
JP3378512B2 (ja) 1998-10-16 2003-02-17 株式会社東芝 半導体装置
US6245616B1 (en) * 1999-01-06 2001-06-12 International Business Machines Corporation Method of forming oxynitride gate dielectric
US6242785B1 (en) * 1999-01-26 2001-06-05 Advanced Micro Devices, Inc. Nitride based sidewall spaces for submicron MOSFETs
US6737716B1 (en) * 1999-01-29 2004-05-18 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same
US6207995B1 (en) * 1999-02-23 2001-03-27 Advanced Micro Devices, Inc. High K integration of gate dielectric with integrated spacer formation for high speed CMOS
US6303479B1 (en) * 1999-12-16 2001-10-16 Spinnaker Semiconductor, Inc. Method of manufacturing a short-channel FET with Schottky-barrier source and drain contacts
JP3675303B2 (ja) 2000-05-31 2005-07-27 セイコーエプソン株式会社 静電気保護回路が内蔵された半導体装置及びその製造方法
US6420742B1 (en) 2000-06-16 2002-07-16 Micron Technology, Inc. Ferroelectric memory transistor with high-k gate insulator and method of fabrication
US6486080B2 (en) 2000-11-30 2002-11-26 Chartered Semiconductor Manufacturing Ltd. Method to form zirconium oxide and hafnium oxide for high dielectric constant materials
US6413829B1 (en) 2001-06-01 2002-07-02 Advanced Micro Devices, Inc. Field effect transistor in SOI technology with schottky-contact extensions
US6509609B1 (en) 2001-06-18 2003-01-21 Motorola, Inc. Grooved channel schottky MOSFET
EP1417718A1 (en) * 2001-08-10 2004-05-12 Spinnaker Semiconductor, Inc. Transistor having high dielectric constant gate insulating layer and source and drain forming schottky contact with substrate
US6894355B1 (en) * 2002-01-11 2005-05-17 Advanced Micro Devices, Inc. Semiconductor device with silicide source/drain and high-K dielectric
US6555879B1 (en) 2002-01-11 2003-04-29 Advanced Micro Devices, Inc. SOI device with metal source/drain and method of fabrication

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006237512A (ja) * 2005-02-28 2006-09-07 Toshiba Corp 半導体装置

Also Published As

Publication number Publication date
US20070007605A1 (en) 2007-01-11
US8022459B2 (en) 2011-09-20
US7674680B2 (en) 2010-03-09
US20040171240A1 (en) 2004-09-02
CN1555579A (zh) 2004-12-15
US20100213556A1 (en) 2010-08-26
CN100359701C (zh) 2008-01-02
EP1417718A1 (en) 2004-05-12
WO2003015181A1 (en) 2003-02-20
US20050106821A1 (en) 2005-05-19
US20030034532A1 (en) 2003-02-20
US6949787B2 (en) 2005-09-27
WO2003015181B1 (en) 2003-10-02

Similar Documents

Publication Publication Date Title
JP2004538650A (ja) 基板とのショットキーコンタクトを形成する高誘電率ゲート絶縁層、ソースおよびドレインを有するトランジスタ
US20030032270A1 (en) Fabrication method for a device for regulating flow of electric current with high dielectric constant gate insulating layer and source/drain forming schottky contact or schottky-like region with substrate
US7115945B2 (en) Strained silicon fin structure
RU2245589C2 (ru) Устройство полевого моп-транзистора и способ его изготовления
US7939902B2 (en) Field effect transistor having source and/or drain forming schottky or schottky-like contact with strained semiconductor substrate
US7456464B2 (en) Semiconductor device including insulated gate type transistor and insulated gate type variable capacitance, and method of manufacturing the same
US20100013015A1 (en) Metal source/drain schottky barrier silicon-on-nothing mosfet device
US20050118793A1 (en) Schottky-barrier MOSFET manufacturing method using isotropic etch process
EP1797592A1 (en) Double gate device having a strained channel
CN101877317B (zh) 非平坦晶体管及其制造方法
KR101267293B1 (ko) 개선된 성능 및 방법을 가진 전력 반도체 디바이스
US7863121B2 (en) Method for fabricating Schottky barrier tunnel transistor
JPH10284722A (ja) Ｍｏｓｆｅｔ及びその製造方法
JP5108408B2 (ja) 半導体装置及びその製造方法
CN111162074A (zh) 半导体结构及其形成方法
US20060079059A1 (en) Transistor having high dielectric constant gate insulating layer and source and drain forming schottky contact with substrate
US20250359264A1 (en) Lateral diffusion metal oxide semiconductor (ldmos) transistor and method of making
JP2007158300A (ja) 低いショットキー障壁貫通トランジスタ及びその製造方法
US20250133804A1 (en) Lateral diffusion metal oxide semiconductor (ldmos) transistor and method of making
JP2005175011A (ja) 電界効果型トランジスタ及びその製造方法
CN118173579A (zh) 半导体器件及制造方法
TW201338052A (zh) 金氧半導體元件的製造方法

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20050719

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20070517

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20090202

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20090703