JP2004530296A - メモリセルアレイの金属性ビット線の製造方法、メモリセルアレイの製造方法、およびメモリセルアレイ - Google Patents

メモリセルアレイの金属性ビット線の製造方法、メモリセルアレイの製造方法、およびメモリセルアレイ Download PDF

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Publication number
JP2004530296A
JP2004530296A JP2002578576A JP2002578576A JP2004530296A JP 2004530296 A JP2004530296 A JP 2004530296A JP 2002578576 A JP2002578576 A JP 2002578576A JP 2002578576 A JP2002578576 A JP 2002578576A JP 2004530296 A JP2004530296 A JP 2004530296A
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Prior art keywords
layer
memory cell
bit line
region
cell array
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JP2002578576A
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Japanese (ja)
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JP2004530296A5 (enExample
Inventor
カコシュケ，ロナルド
ヴィラー，ヨーゼフ
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Infineon Technologies AG
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Infineon Technologies AG
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Publication of JP2004530296A publication Critical patent/JP2004530296A/ja
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Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/40—EEPROM devices comprising charge-trapping gate insulators characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

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  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
JP2002578576A 2001-03-02 2002-02-13 メモリセルアレイの金属性ビット線の製造方法、メモリセルアレイの製造方法、およびメモリセルアレイ Pending JP2004530296A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10110150A DE10110150A1 (de) 2001-03-02 2001-03-02 Verfahren zum Herstellen von metallischen Bitleitungen für Speicherzellenarrays, Verfahren zum Herstellen von Speicherzellenarrays und Speicherzellenarray
PCT/EP2002/001508 WO2002080275A2 (de) 2001-03-02 2002-02-13 Speicherzellenarrays und deren herstellungssverfahren

Publications (2)

Publication Number Publication Date
JP2004530296A true JP2004530296A (ja) 2004-09-30
JP2004530296A5 JP2004530296A5 (enExample) 2007-02-08

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JP2002578576A Pending JP2004530296A (ja) 2001-03-02 2002-02-13 メモリセルアレイの金属性ビット線の製造方法、メモリセルアレイの製造方法、およびメモリセルアレイ

Country Status (9)

Country Link
US (1) US6686242B2 (enExample)
EP (1) EP1364409A2 (enExample)
JP (1) JP2004530296A (enExample)
KR (1) KR100608407B1 (enExample)
CN (1) CN100336227C (enExample)
AU (1) AU2002338242A1 (enExample)
DE (1) DE10110150A1 (enExample)
TW (1) TW540141B (enExample)
WO (1) WO2002080275A2 (enExample)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005191594A (ja) * 2005-02-22 2005-07-14 Nec Electronics Corp 不揮発性半導体記憶装置の製造方法
JP2007158297A (ja) * 2005-12-05 2007-06-21 Taiwan Semiconductor Manufacturing Co Ltd メモリデバイス
JP2007537592A (ja) * 2004-05-11 2007-12-20 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド デュアルポリを用いたビット線注入
JP2008527747A (ja) * 2005-01-12 2008-07-24 スパンジョン・リミテッド・ライアビリティ・カンパニー 台形のビット線を有するメモリ装置、およびその製造方法
JP2010087424A (ja) * 2008-10-02 2010-04-15 Spansion Llc 半導体装置及び半導体装置の製造方法

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DE102005038939B4 (de) * 2005-08-17 2015-01-08 Qimonda Ag Halbleiterspeicherbauelement mit oberseitig selbstjustiert angeordneten Wortleitungen und Verfahren zur Herstellung von Halbleiterspeicherbauelementen
US7668017B2 (en) 2005-08-17 2010-02-23 Saifun Semiconductors Ltd. Method of erasing non-volatile memory cells
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JP2007537592A (ja) * 2004-05-11 2007-12-20 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド デュアルポリを用いたビット線注入
JP2008527747A (ja) * 2005-01-12 2008-07-24 スパンジョン・リミテッド・ライアビリティ・カンパニー 台形のビット線を有するメモリ装置、およびその製造方法
JP2005191594A (ja) * 2005-02-22 2005-07-14 Nec Electronics Corp 不揮発性半導体記憶装置の製造方法
JP2007158297A (ja) * 2005-12-05 2007-06-21 Taiwan Semiconductor Manufacturing Co Ltd メモリデバイス
JP2011103488A (ja) * 2005-12-05 2011-05-26 Taiwan Semiconductor Manufacturing Co Ltd メモリデバイス
JP2010087424A (ja) * 2008-10-02 2010-04-15 Spansion Llc 半導体装置及び半導体装置の製造方法

Also Published As

Publication number Publication date
US20020132430A1 (en) 2002-09-19
WO2002080275A3 (de) 2003-01-30
AU2002338242A1 (en) 2002-10-15
KR100608407B1 (ko) 2006-08-03
CN1502134A (zh) 2004-06-02
US6686242B2 (en) 2004-02-03
TW540141B (en) 2003-07-01
DE10110150A1 (de) 2002-09-19
KR20030088444A (ko) 2003-11-19
EP1364409A2 (de) 2003-11-26
CN100336227C (zh) 2007-09-05
WO2002080275A2 (de) 2002-10-10

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