JP2001298186A - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法

Info

Publication number
JP2001298186A
JP2001298186A JP2000118491A JP2000118491A JP2001298186A JP 2001298186 A JP2001298186 A JP 2001298186A JP 2000118491 A JP2000118491 A JP 2000118491A JP 2000118491 A JP2000118491 A JP 2000118491A JP 2001298186 A JP2001298186 A JP 2001298186A
Authority
JP
Japan
Prior art keywords
film
metal
tungsten
silicon
silicide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000118491A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001298186A5 (https=
Inventor
Kazuhiro Onishi
和博 大西
Naoki Yamamoto
直樹 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2000118491A priority Critical patent/JP2001298186A/ja
Priority to US09/829,969 priority patent/US6750503B2/en
Priority to KR1020010019864A priority patent/KR20010098593A/ko
Priority to TW090108966A priority patent/TW492186B/zh
Publication of JP2001298186A publication Critical patent/JP2001298186A/ja
Priority to US10/812,995 priority patent/US20040178440A1/en
Publication of JP2001298186A5 publication Critical patent/JP2001298186A5/ja
Priority to US11/087,612 priority patent/US20050164441A1/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
    • H10D64/662—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures
    • H10D64/664—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures the additional layers comprising a barrier layer between the layer of silicon and an upper metal or metal silicide layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01306—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon
    • H10D64/01308—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal
    • H10D64/0131—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal the additional conductive layer comprising a silicide layer formed by the silicidation reaction between the layer of silicon with a metal layer which is not formed by metal implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H10D84/0174—Manufacturing their gate conductors the gate conductors being silicided
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H10D84/0177—Manufacturing their gate conductors the gate conductors having different materials or different implants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H10W10/0143—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations comprising concurrently refilling multiple trenches having different shapes or dimensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2000118491A 2000-04-14 2000-04-14 半導体装置およびその製造方法 Pending JP2001298186A (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2000118491A JP2001298186A (ja) 2000-04-14 2000-04-14 半導体装置およびその製造方法
US09/829,969 US6750503B2 (en) 2000-04-14 2001-04-11 Stacked gate electrode for a MOS transistor of a semiconductor device
KR1020010019864A KR20010098593A (ko) 2000-04-14 2001-04-13 반도체 장치 및 그 제조 방법
TW090108966A TW492186B (en) 2000-04-14 2001-04-13 Semiconductor device and process for producing the same
US10/812,995 US20040178440A1 (en) 2000-04-14 2004-03-31 Semiconductor device and process for producing the same
US11/087,612 US20050164441A1 (en) 2000-04-14 2005-03-24 Semiconductor device and process for producing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000118491A JP2001298186A (ja) 2000-04-14 2000-04-14 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
JP2001298186A true JP2001298186A (ja) 2001-10-26
JP2001298186A5 JP2001298186A5 (https=) 2004-10-14

Family

ID=18629618

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000118491A Pending JP2001298186A (ja) 2000-04-14 2000-04-14 半導体装置およびその製造方法

Country Status (4)

Country Link
US (3) US6750503B2 (https=)
JP (1) JP2001298186A (https=)
KR (1) KR20010098593A (https=)
TW (1) TW492186B (https=)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100433437B1 (ko) * 2000-07-21 2004-05-31 미쓰비시덴키 가부시키가이샤 반도체 장치 및 그 제조 방법 및 ｃｍｏｓ 트랜지스터
JP2006522481A (ja) * 2003-03-28 2006-09-28 サイプレス セミコンダクター コーポレイション Ｍｏｓトランジスタのためのゲート電極
KR100693878B1 (ko) 2004-12-08 2007-03-12 삼성전자주식회사 낮은 저항을 갖는 반도체 장치 및 그 제조 방법
US7253465B2 (en) 2003-04-16 2007-08-07 Hitachi, Ltd. Semiconductor integrated circuit device and manufacturing method thereof
KR100914283B1 (ko) * 2006-12-28 2009-08-27 주식회사 하이닉스반도체 반도체소자의 폴리메탈게이트 형성방법
WO2019093206A1 (ja) * 2017-11-09 2019-05-16 国立研究開発法人産業技術総合研究所 半導体装置及びその製造方法

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4926329B2 (ja) 2001-03-27 2012-05-09 株式会社半導体エネルギー研究所 半導体装置およびその作製方法、電気器具
US7132698B2 (en) * 2002-01-25 2006-11-07 International Rectifier Corporation Compression assembled electronic package having a plastic molded insulation ring
US7084423B2 (en) 2002-08-12 2006-08-01 Acorn Technologies, Inc. Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
US6833556B2 (en) 2002-08-12 2004-12-21 Acorn Technologies, Inc. Insulated gate field effect transistor having passivated schottky barriers to the channel
US7534709B2 (en) 2003-05-29 2009-05-19 Samsung Electronics Co., Ltd. Semiconductor device and method of manufacturing the same
US7183221B2 (en) * 2003-11-06 2007-02-27 Texas Instruments Incorporated Method of fabricating a semiconductor having dual gate electrodes using a composition-altered metal layer
US20050124127A1 (en) * 2003-12-04 2005-06-09 Tzu-En Ho Method for manufacturing gate structure for use in semiconductor device
DE102004004864B4 (de) * 2004-01-30 2008-09-11 Qimonda Ag Verfahren zur Herstellung einer Gate-Struktur und Gate-Struktur für einen Transistor
JP2005327848A (ja) * 2004-05-13 2005-11-24 Toshiba Corp 半導体装置及びその製造方法
KR100681211B1 (ko) * 2005-06-30 2007-02-09 주식회사 하이닉스반도체 이중 확산방지막을 갖는 게이트전극 및 그를 구비한반도체소자의 제조 방법
KR100655658B1 (ko) * 2005-07-26 2006-12-08 삼성전자주식회사 게이트 전극 구조물과 그 제조 방법 및 이를 갖는 반도체트랜지스터와 그 제조 방법
KR100654358B1 (ko) * 2005-08-10 2006-12-08 삼성전자주식회사 반도체 집적 회로 장치와 그 제조 방법
KR100642761B1 (ko) * 2005-09-07 2006-11-10 삼성전자주식회사 반도체 소자 및 그 제조 방법
KR100694660B1 (ko) * 2006-03-08 2007-03-13 삼성전자주식회사 트랜지스터 및 그 제조 방법
JP4327820B2 (ja) * 2006-06-05 2009-09-09 株式会社東芝 半導体装置およびその製造方法
JP4575400B2 (ja) * 2007-05-08 2010-11-04 株式会社東芝 半導体装置の製造方法
KR20100100178A (ko) * 2009-03-05 2010-09-15 삼성전자주식회사 반도체 소자
KR101990622B1 (ko) 2011-11-23 2019-06-18 아콘 테크놀로지스 인코포레이티드 계면 원자 단일층의 삽입에 의한 ⅳ족 반도체에 대한 금속 접점의 개선
KR20140007609A (ko) * 2012-07-09 2014-01-20 삼성전자주식회사 반도체 장치의 제조방법
JP2014053557A (ja) * 2012-09-10 2014-03-20 Toshiba Corp 半導体装置およびその製造方法
US20170054032A1 (en) 2015-01-09 2017-02-23 SanDisk Technologies, Inc. Non-volatile memory having individually optimized silicide contacts and process therefor
US9620611B1 (en) 2016-06-17 2017-04-11 Acorn Technology, Inc. MIS contact structure with metal oxide conductor
WO2018094205A1 (en) 2016-11-18 2018-05-24 Acorn Technologies, Inc. Nanowire transistor with source and drain induced by electrical contacts with negative schottky barrier height
CN107221495B (zh) * 2017-06-05 2018-07-20 睿力集成电路有限公司 一种半导体器件结构及其制备方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5010032A (en) * 1985-05-01 1991-04-23 Texas Instruments Incorporated Process for making CMOS device with both P+ and N+ gates including refractory metal silicide and nitride interconnects
US6291868B1 (en) * 1998-02-26 2001-09-18 Micron Technology, Inc. Forming a conductive structure in a semiconductor device
US6265297B1 (en) * 1999-09-01 2001-07-24 Micron Technology, Inc. Ammonia passivation of metal gate electrodes to inhibit oxidation of metal
US20020008294A1 (en) 2000-07-21 2002-01-24 Mitsubishi Denki Kabushiki Kaisha Semiconductor device and method for manufacturing same
KR100351907B1 (ko) 2000-11-17 2002-09-12 주식회사 하이닉스반도체 반도체 소자의 게이트 전극 형성방법

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100433437B1 (ko) * 2000-07-21 2004-05-31 미쓰비시덴키 가부시키가이샤 반도체 장치 및 그 제조 방법 및 ｃｍｏｓ 트랜지스터
JP2006522481A (ja) * 2003-03-28 2006-09-28 サイプレス セミコンダクター コーポレイション Ｍｏｓトランジスタのためのゲート電極
US7253465B2 (en) 2003-04-16 2007-08-07 Hitachi, Ltd. Semiconductor integrated circuit device and manufacturing method thereof
KR100693878B1 (ko) 2004-12-08 2007-03-12 삼성전자주식회사 낮은 저항을 갖는 반도체 장치 및 그 제조 방법
KR100914283B1 (ko) * 2006-12-28 2009-08-27 주식회사 하이닉스반도체 반도체소자의 폴리메탈게이트 형성방법
WO2019093206A1 (ja) * 2017-11-09 2019-05-16 国立研究開発法人産業技術総合研究所 半導体装置及びその製造方法
JPWO2019093206A1 (ja) * 2017-11-09 2020-12-17 国立研究開発法人産業技術総合研究所 半導体装置及びその製造方法

Also Published As

Publication number Publication date
US6750503B2 (en) 2004-06-15
US20050164441A1 (en) 2005-07-28
KR20010098593A (ko) 2001-11-08
US20040178440A1 (en) 2004-09-16
TW492186B (en) 2002-06-21
US20010030342A1 (en) 2001-10-18

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